1,720,966 research outputs found
Proton-induced MBU Effects in Real-time Operating System on Embedded Soft Processor
Get PDFIn this paper, we perform an evaluation of the impact of radiation-induced micro-architectural faults affecting the Microblaze soft-processor running a Real-Time Operating System. Fault injection campaigns with a proton-radiation test fault model are presented
Radiation-induced Effects on DMA Data Transfer in Reconfigurable Devices
Get PDFAs the adoption of SRAM-based FPGAs and Reconfigurable SoCs for High-Performance Computing increased in the last years, the use of Direct Memory Access for data transfer becomes a key feature of many reconfigurable applications even in the space industry. For such kinds of applications, radiation-induced effects are a serious issue that mines the correctness and success of mission-critical tasks. In this paper, we evaluate the effects of proton-induced errors on a DMA-based application implemented on a Xilinx Zynq-7020 FPGA in order to quantify the robustness of this module in a typical hardware-accelerated configuration. The obtained results confirm the high criticality of the DMA module on programmable logic. Moreover, the Multiple Bits Upsets effect has been evaluated. The most recurring patterns have been reported in order to provide further tools to better characterize the behavior of these systems under future fault injection campaigns, as demonstrated in the experimental results
Effective Mitigation of Radiation-induced Single Event Transient on Flash-based FPGAs
No full textDue to the decreasing feature sizes of VLSI circuits, radiation induced Single Event Transients (SETs) are increasingly dominating the event ratio on modern VLSI devices. In particular, Flash-based FPGAs are characterized by the main concern of radiation-induced voltage glitches or SETs in the combinational logic. Transient pulses can be sampled by a storage element and can propagate through the circuit up to the outputs and leading to an error. In this paper, we propose a complete implementation flow including sensitivity analysis, fault tolerant mapping and fault tolerance-oriented place and route for the effective design of SET tolerant circuits on Flash-based FPGAs. In details, the proposed method allows accurate measurement of the transient pulse source induced by radiation particles and estimation of the SET error rate on the overall circuit. Besides the developed method provides a netlist mapping and place and route tool for the selective mitigation of SET effects. The proposed method has been applied to an industrial design oriented to the Euclid European Space Agency mission including more than ten different modules. The obtained results show an improvement of the total filtering capability of around 43 times with respect to the original netlist without affecting the timing constraints of the circuit
Analysis of Proton-induced Single Event Effect in the On-Chip Memory of Embedded Processor
Get PDFEmbedded processors had been established as common components in modern systems. Usually, they are provided with different types and hierarchical levels of memory, some of them integrated into the same chip (on-chip memory).
Due to the high density of transistors, memories are known to be particularly sensitive to soft errors. Soft errors afflicting
memories can manifest in various forms besides traditional single-bit value corruption. In this paper, a comprehensive
description of radiation-induced effects detected in the SRAM on-chip memory of an ARM Cortex-A9 MPCore during a
proton-beam test is performed. The experimental setup, data acquisition methodology, and observed effects are reported in detail including a cross-section for different energies. Fault models for system-level reliability evaluation are proposed,
complete with their distribution. Finally, the proposed fault models are used in fault injection campaigns on a software
benchmark suite and results are discussed
A Novel Error Rate Estimation Approach for UltraScale+ SRAM-based FPGAs
No full textSRAM-based FPGA devices manufactured in FinFET technologies provide performances and characteristics suitable for avionics and aerospace applications. The estimation of error rate sensitivity to harsh environments is a major concern for enabling their usage on such application fields. In this paper, we propose a new estimation approach able to consider the radiation effects on the configuration memory and logic layer of FPGAs, providing a comprehensive Application Error Rate probability estimation. Experimental results provide a comparison between radiation test campaigns, which demonstrates the feasibility of the proposed solution.This work was supported as part of the RESCUE project that has received funding from the European Union's Horizon
2020 research and innovation programme under the Marie Skłodowska-Curie grant agreement No. 722325 and by the European Space Agency under contract No. 4000116569
Exploring the Impact of Soft Errors on the Reliability of Real-Time Embedded Operating Systems
Get PDFThe continuous scaling of electronic components has led to the development of high-performance microprocessors that are suitable even for safety-critical applications where radiation-induced errors such as Single Event Effects (SEEs) can have a significant impact on the performance and reliability of the system. This work is dedicated to investigating the reliability of systems based on programmable hardware and Real-time operating Systems (RTOS) in the presence of architectural faults induced by soft errors in the configuration memory of the programmable hardware. We performed a proton radiation test campaigned at PSI radiation facility to identify the fault model affecting the configuration memory of Xilinx Zynq-7020 reconfigurable AP-Soc Device. The identified fault model in terms of SEU and MBU clusters has been used to evaluate the impact of proton-induced faults on applications running within FreeRTOS on a Microblaze soft processor. A Single Event Multiple Upset fault model resulting from a proton test is presented, focusing on characteristics such as shape, size, and frequency of observed cluster of errors. We conduct two fault injection campaigns and analyze the results to assess the effect of cluster size on system reliability. Moreover, we discuss software exceptions caused by faults that can affect the hardware structure of the soft processor
SETA: A CAD tool for Single Event Transient Analysis and Mitigation on Flash-based FPGAs
Get PDFFlash-based Field Programmable Gate Array (FPGA) devices are nowadays golden cores of many applications especially in space and avionic fields where reliability is becoming an important concern. In particular, for Flash-based FPGAs when adopted in those applications, the main concern is radiation-induced voltage glitched know as Single Event Transient (SET) in the combinational logic. In this work, a new CAD tool has been developed in order to evaluate the sensitivity of the implemented circuit regarding SET and to mitigate their effects. The proposed tool has been applied to an industrial design adopted by the EUCLID space mission including more than ten different modules. The experimental results demonstrated the feasibility and efficiency of proposed tool
PyXEL: Exploring Bitstream Analysis to Assess and Enhance the Robustness of Designs on FPGAs
Get PDFCommercial hardware-reconfigurable systems-on-chip are highly attractive for mission-critical applications in the space and automotive industries. However, their vulnerability to soft errors is a major concern, and analyzing the robustness of these systems is a complex task due to the lack of dedicated tools, information, and methodologies available. PyXEL is a tool designed to address these issues, providing the methodology for automating reliability analysis based on radiation and fault injection campaigns and facilitating the development of mitigation solutions based on customized place-and-route. Furthermore, PyXEL offers the methodology for visualizing, decoding, and analyzing the configuration data of programmable hardware devices, enabling more precise and efficient evaluation and analysis of the robustness of systems implemented on programmable hardware devices
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