123 research outputs found
Comparative Analysis of Kinematic Approximation and Richards Equation Models for Subsurface Flow on Complex Hillslopes
No full textGeneralized solutions for the kinematic wave equation for subsurface flow have recently been derived for hillslopes of arbitrary geometry by introducing two dimensionless geometric parameters α and ε which define the hydrologic similarity between hillslopes with respect to their characteristic response (Norbiato and Borga, 2008). These solutions are derived by using a second order polynomial function to describe the bedrock slope and an exponential function to describe the variation of the width of the hillslope with hillslope distance. In this presentation we assess the behavior of this simple, one- dimensional model in comparison with a fully three-dimensional Richards equation model for a series of free drainage scenarios. For different values of saturated hydraulic conductivity, we specify the range of values of the two dimensionless geometric parameters α and ε for which the generalized solution is valid. Special attention is given to the discretization and setup of the boundary and initial conditions
Characterization and modeling of GaN-based transistors for power applications
No full textGaN-based devices have emerged as a promising solution for power management applications. The intrinsic physical properties of the Gallium Nitride are exploited in order to considerably improve the efficiency and to reduce the volume of the next generation power switching converters. The wide energy gap allows to fabricate high voltage-rate devices with a reduced area consumption, whereas the high mobility guarantees a considerably low on-Resistance of the transistor. Moreover, thanks to the reduced parasitic capacitances, the operating frequency of the devices can be higher than conventional Silicon based transistors.
In order to ensure a wide spreading of Gallium Nitride technology in the power transistors market, the price of the devices needs to be kept as low as possible. The costs of native substrates for the fabrication of GaN transistors are nowadays prohibitive, so that the epitaxial growth of Gallium Nitride on Silicon substrates has been developed. GaN-on-Silicon is the most suitable technology to fabricate GaN-based devices on a cheap and large area wafers (up to 200 mm), resulting in a significant reduction of the production costs.
On the other hand, growing GaN on a foreign substrate results in high dislocation and defect densities which could affect the performance of the devices in terms of both losses and reliability issues. A so-called “buffer decomposition experiment” allowed to evaluate the role of the different layers which compose the vertical stack of a GaN-on-Silicon wafer by characterizing samples obtained by stopping the epitaxial growth at different stages of the process. It is demonstrated that both the thickness and the composition of the epitaxial stack, beside enhancing the breakdown voltage, improve the material quality by limiting the propagation of defects and dislocations. Moreover, a study on the reliability of the Aluminum Nitride layer grown on silicon is presented, showing that the AlN fails due to a wear-out process following a Weibull distribution. Furthermore, an extensive analysis on the reliability of the GaN-on-Silicon vertical stack is presented, as well as a systematic study on the failure statistic. It is shown that the time to failure of the GaN-on-Silicon stack is Weibull distributed, and, although it is weakly temperature-activated, it exponentially depends on the applied voltage. Moreover, the expected lifetime of the tested devices at the operating voltage is extracted.
Aiming to further improve the performance of lateral High Electrons Mobility Transistors (HEMTs) in terms of vertical robustness and losses reduction, the impact of the resistivity of the silicon substrates has been evaluated. It is shown that highly resistive p-doped substrate results in a plateau region in the IV characteristic which considerably increases the vertical breakdown voltage of the devices. Nevertheless, the existence of a trade-off between the vertical robustness and the stability of the threshold voltage is demonstrated. A set of electrical characterization ascribes the threshold voltage shift to the positive backgating effect possibly related to the capacitive coupling of the partially depleted substrate which only occurs if lowly p-doped silicon is used. The origin of the plateau region is further investigated by means of a set of TCAD simulations, allowing to develop a two-diodes model which confirms the hypothesis on the substrate depletion.
Even if stable and reliable lateral HEMTs are commercially available, their operating voltage is limited to ~ 900 V. In order to expand the applications field of the GaN-based devices to higher operating voltage, different device concepts have been developed so far. A promising solution is represented by (semi-)vertical trench gate devices, which are characterized by a thick drift layer where the OFF-state electric field spreads vertically in a bulky region, thus avoiding surface effects. Thanks to the vertical architecture, the OFF-state breakdown only depends on the thickness of the epitaxial stack, thus allowing to reach high breakdown voltages with a limited area consumption.
Since the carriers must flow vertically, the gate of the devices lies in an etched trench, and it consists of a Metal Oxide Semiconductor (MOS) system. Within this thesis the gate leakage is deeply studied on devices with different gate dielectric, by means of electrical characterizations performed with different connection configurations and different bias polarities. Moreover, the gate capacitance is analytically calculated, and the experimental behavior observed for the Gate-Source and Gate-Drain capacitances over the applied voltage is discussed and modeled considering the GaN bias condition close to the dielectric interface. Lastly, a preliminary dielectric trap characterization is performed by evaluating the capacitance hysteresis induced by the electric field within different gate oxide materials.
The last section of this work presents a custom setup developed for the characterization of the threshold voltage variations over the time. The stability of the threshold voltage is fundamental for allowing a device to operate properly in a switching converter. Standard pulsed systems used for the characterization of the threshold voltage allow to evaluate the impact of the bias level on the threshold variation, but no details on the time evolution can be obtained. The presented threshold transient setup monitors the threshold voltage variation over a wide time-interval, ranging from 10 μs to 100 s, allowing the analysis of the trapping and detrapping kinetics. Moreover, by monitoring the transient variation as a function of the temperature it is possible to full characterize (energy level and cross section) the traps involved in the observed instabilities
A field and modeling study of nonlinear storage-discharge dynamics for an Alpine headwater catchment
No full textA process-based coupled model of surface-subsurface flow is applied to the simulation of nonlinear hydrological dynamics for an experimental mountain headwater catchment in northeastern Italy. The comparison between measured and simulated responses, both distributed (water table and soil moisture) and integrated (streamflow at the outlet), shows that the model satisfactorily reproduces various nonlinear processes, in particular threshold behavior and hysteresis in the catchment storage-discharge relationship. We typically observe a clockwise loop in this relationship, i.e., streamflow response is faster than groundwater and soil moisture response, due to larger time scales for subsurface processes and to soil moisture persistence and redistribution. The model is based on a standard Richards equation representation of integrated saturated-unsaturated-runoff dynamics and needs no ad hoc parameterization (e.g., for macropores, pipe flow, or retention curve hysteresis) to capture observed hysteretic relationships between storage and discharge. Additional numerical experiments are carried out to investigate how heterogeneity (bedrock permeability and the distinction between riparian and hillslope areas) and aquifer thickness and topography affect this nonlinear dynamics. The results show that catchment topography and soil depth exert the main control on the hysteresis and threshold patterns. This is evident from a spatial analysis of streamflow and water table response times to storm events, where the threshold points correspond to changes in terrain slope. These findings are confirmed by a further set of analyses carried out on an idealized v-shaped catchment
Analysis of the drain-to-substrate leakage of power HEMTs grown on highly resistive silicon substrate
No full textEnhancing the forward gate bias robustness in p-GaN gate high-electron-mobility transistors through doping profile engineering
No full textThis article presents a study on the improvement of the gate robustness and reliability of p-GaN gate high-electron-mobility transistors (HEMTs) by doping profile engineering and by performing a thermal treatment. The reduction of the p-doping concentration at the Schottky interface using a graded magnesium (Mg) profile in the p-GaN layer and introducing a top Si-GaN cap layer is proposed, combined with a high-temperature anneal step after the gate patterning. The results show that the proposed approach enhances the gate breakdown voltage, reduces the gate leakage current, and increases the time to failure under constant voltage stress, while ensuring stable dynamic behavior and off-state leakage performance under high-voltage stress.
This study presents a detailed analysis of p-doping engineering in p-GaN gate high-electron-mobility transistors HEMTs, elevating the concept to a higher technology readiness level. It provides guidelines for achieving the desired doping profile and discusses the trade-offs. The study also demonstrates the benefits of combining the engineered p-doping profile with a thermal treatment, leading to improved gate robustness and reliabilit
Impact of substrate resistivity on the vertical leakage, breakdown, and trapping in GaN-on-Si E-Mode HEMTs
No full textCorrelation of heat transport mechanism and structural properties of GaN high electron mobility transistors
No full textThis project has received funding from the ECSEL Joint Undertaking (JU) under Grant Agreement No. 876659. The JU receives support from the European Union's Horizon 2020 research and innovation programme Germany, Austria (BMK-IKT der Zukunft, FFG Project No. 877534), Slovakia, Sweden, Finland, Belgium, Italy, Spain, Netherlands, Slovenia, Greece, France, and Turkey. The document reflects only the authors' views and the JU is not responsible for any use that may be made of the information it contains
Impact of Substrate Resistivity on the Vertical Leakage, Breakdown, and Trapping in GaN-on-Si E-Mode HEMTs
No full textThis paper presents an extensive investigation of the impact of the resistivity of the silicon substrate on the vertical leakage and charge trapping in 200 V GaN-on-Si enhancement-mode high-electron mobility transistors. Three wafers having different substrate resistivities were submitted to combined DC characterization, step-stress experiments, and electroluminescence (EL) analysis. The results described within this paper demonstrate that: 1) the use of a highly resistive silicon substrate can increase the vertical breakdown voltage of the transistors, due to the fact that the voltage drop on the GaN buffer is mitigated by the partial depletion of the substrate (this latter causes a plateau region in the drain to substrate I-V characteristic) and 2) highly resistive substrate results in stronger trapping effects, due to the capacitance of the depleted substrate and the resulting backgating effects. The results described within this paper indicate that the choice of the resistivity of the substrate is the result of a tradeoff between high breakdown voltage (that could be in principle achieved through a highly resistive substrate) and the minimization of trapping processes (which can be hardly obtained with a resistive substrate)
Gate reliability of p-GaN power HEMTs under pulsed stress condition
No full textA combined experimental/simulation analysis has been performed to study the gate reliability of GaN-HEMTs with p-type gate under pulse stress conditions. Results show that the time-dependent gate breakdown (TDGB) can be determined by two factors: i) the total ON-time during which the device is subjected to a positive gate bias before the failure; ii) the number of pulses, hence the number of switching phases from OFF- to ON-State and vice versa. The severity of the degradation ascribed to transition phases depends on the OFF-time (t(OF)F) and transition time (t(TR) = t(RISE) = t(FALL)). In particular, the shorter tOFF and tTR, the higher the Schottky junction voltage drop and the current peak during the switching phase, respectively. The higher voltage drop is ascribed to the semi-floating potential of the p-GaN layer
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