1,721,129 research outputs found

    Room-Temperature Ballistic Transport in III-Nitride Heterostructures

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    Room-temperature (RT) ballistic transport of electrons is experimentally observed and theoretically investigated in III-nitrides. This has been largely investigated at low temperatures in low band gap III–V materials due to their high electron mobilities. However, their application to RT ballistic devices is limited by their low optical phonon energies, close to KT at 300 K. In addition, the short electron mean-free-path at RT requires nanoscale devices for which surface effects are a limitation in these materials. We explore the unique properties of wide band-gap III-nitride semiconductors to demonstrate RT ballistic devices. A theoretical model is proposed to corroborate experimentally their optical phonon energy of 92 meV, which is ∼4× larger than in other III–V semiconductors. This allows RT ballistic devices operating at larger voltages and currents. An additional model is described to determine experimentally a characteristic dimension for ballistic transport of 188 nm. Another remarkable property is their short carrier depletion at device sidewalls, down to 13 nm, which allows top-down nanofabrication of very narrow ballistic devices. These results open a wealth of new systems and basic transport studies possible at RT.United States. Defense Advanced Research Projects Agency. Nitride Electronic NeXt-Generation Technology (NEXT) ProgramUnited States. Office of Naval Research. Young Investigator Progra

    A generalized phase-shift PWM extension for improved natural and active balancing of flying capacitor multilevel inverters

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    The emergence of wide bandgap power devices has brought the attention back to the flying capacitor (FC) multilevel inverters with a large number of stages, in an effort to increase the power density by minimizing the passive components. The main challenge that such systems face, particularly the ones based on high-frequency Gallium-Nitride devices and small-value ceramic capacitors, relate to the stringent requirements for precise and fast capacitor balancing. Conventional natural balancing techniques exhibit poor settling times, while most improved natural balancing methods are not easily scalable to more than five levels. The alternative of active balancing normally requires one isolated sensor per FC which increases the overall system cost and footprint, or a single ac-side sensor that is more compact but calls for sophisticated PWMs that again are not available for multiple levels. In this paper we introduce a generalized pulse width modulation (PWM) strategy based on the phase-shift and carrier swapping principles for an arbitrary number of levels. We provide an easy and intuitive method for the extraction of the PWM pattern, the switching states, and their sequence. Simulations were carried out in Matlab/Simulink and experimental tests were conducted on a single-phase 7-level GaN inverter prototype. Not only is the extended PWM advantageous in natural balancing, but it also provides the right zero switching states for ac-side FC sensing in active balancing.</p

    Parallel PV Configuration with Magnetic-Free Switched Capacitor Module-Level Converters for Partial Shading Conditions

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    In this paper, a module-level photovoltaic (PV) architecture in parallel configuration is introduced for maximum power extraction, under partial shading (PS) conditions. For the first time, a non-regulated switched capacitor (SC) nX converter is a used at the PV-side conversion stage, whose purpose is just to multiply the PV voltage by a fixed ratio and accordingly reduce the input current. All the control functions, including the maximum power point tracking, are transferred to the grid-side inverter. The voltage-multiplied PV modules (VMPVs) are connected in parallel to a common DC-bus, which offers expandability to the system and eliminates the PS issues of a typical string architecture. The advantage of the proposed approach is that the PV-side converter is relieved of bulky capacitors, filters, controllers and voltage/current sensors, allowing for a more compact and efficient conversion stage, compared to conventional per-module systems, such as microinverters. The proposed configuration was initially simulated in a 5 kW residential PV system and compared against conventional PV arrangements. For the experimental validation, a 10X Gallium Nitride (GaN) converter prototype was developed with a flat conversion efficiency of 96.3% throughout the power range. This is particularly advantageous, given the power production variability of PV generators. Subsequently, the VMPV architecture was tested on a two-module 500 WP prototype, exhibiting an excellent power extraction efficiency of over 99.7% under PS conditions and minimal DC-bus voltage variation of 3%, leading to a higher total system efficiency compared to most state-of-the-art configurations.POWERLABThis is an Open Access article under the terms of the Creative Commons Attribution Licens

    Direct high-temperature MOCVD growth of GaN on foreign substrates

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    GaN-based devices are ubiquitous in everyday life, ranging from InGaN/GaN light-emitting diodes (LEDs) for illumination to AlGaN/GaN high-electron-mobility transistors for compact power supplies. Nevertheless, despite the tremendous development in the past thirty years, GaN technology is far from reaching maturity, and many challenges are yet to be solved. Among them, the realization in a practical way of fully-vertical GaN-on-Si power devices and the demonstration of high-efficiency red InGaN microLEDs are crucial from an industry perspective. The growth and quality of a III-nitride film critically depend on the choice of the substrate and on the design of the intermediate buffer layer. This suggests that a novel approach in selecting the substrate and buffer may be the key to solve the open challenges. In this thesis, we propose an innovative and original technique to directly grow GaN at high temperature (HT) on a foreign substrate by metalorganic chemical vapor deposition (MOCVD), without the use of any low-temperature (LT) buffer, by simply employing an in-situ preflow with trimethylaluminum (TMAl). We investigated for the first time this method to directly growth GaN on ScAlMgO4 (SAM), a novel substrate with a small lattice mismatch with respect to GaN. Our proposed technique resulted in mirror-like Ga-polar GaN layers on SAM with morphology and crystal quality comparable to the use of conventional LT GaN buffers. At the same time, our method enabled the growth of arbitrarily thin GaN layers directly on SAM, thanks to the absence of the initial 3D growth step. The effect of the TMAl preflow parameters (duration, flow, and carrier gas) was studied in detail, and a model for the growth mechanism was proposed. This technique was applied to grow an ultra-thin GaN layer on SAM as a buffer for the subsequent growth of a thick In0.17Ga0.83N layer, with the same lattice constant of SAM, for high-indium-content InGaN quantum wells, which presented a higher crystal quality and photoluminescence efficiency compared to reference samples grown with a conventional LT InGaN buffer. Therefore, our growth technique may contribute to the achievement of red InGaN microLEDs. Moreover, as an alternative to the in-situ TMAl preflow, we demonstrated that GaN could be grown on SAM at HT also using an ex-situ Al deposition, resulting in smooth films with an even better crystal quality compared to a TMAl preflow. We clarified the growth mechanism, revealing the role of the thermally-dewetted Al layer on the improvement in GaN quality. Finally, we demonstrated that the direct HT GaN growth with TMAl preflow was successful also in the case of sapphire and Si substrates. In particular, we found that n-GaN layers directly grown on n-Si with a TMAl preflow not only present a better crystalline quality compared to the use of thin AlN buffers, but also exhibit orders-of-magnitude improvement in vertical current conduction between GaN and Si, thanks to the absence of highly resistive AlN layers. Therefore, our proposed technique opens a new pathway for the effective realization of fully-vertical GaN-on-Si devices. In conclusion, in this thesis we proposed a new technique to directly grow GaN on foreign substrates (SAM, sapphire and Si) by simply using a TMAl preflow, without any intentional buffer layer. The obtained results confirmed that our proposed growth method could contribute to solve the open challenges holding back the next generation of GaN devicesPOWERLA

    Near-junction microfluidic cooling for high power-density GaN-on-Si electronics: A wafer, device, packaging, and system-level investigation

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    Electrification of the energy section, from generation to end-use, plays an essential role in reducing global CO2 emission. Innovations in power electronics are required to increase conversion efficiency and power density. Gallium nitride (GaN) transistors have emerged over the last decade as a viable alternative to silicon-based devices to address these needs and pave the way for power integrated circuits that replace traditional discrete devices. However, integration of high power components causes thermal challenges that ultimately limits integration density. Microfluidic cooling is a promising candidate to overcome these limitations. By integrating microchannels directly in a chip, and passing coolant through the device, over 1 kW/cm2 of heat can be extracted. While this approach has been studied for silicon ICs, GaN RF devices, an in-depth study on the application to GaN-on-Si power devices is lacking. In this thesis, we explore the possibility of improving thermal performance of GaN-on-Si power devices, by turning the silicon substrate from a low-cost carrier into a high-performance heat sink. 4 distinct levels of integration are investigated, and at each level, we benchmark the cooling performance and efficiency, and provide a breakdown of which components form the bottleneck in heat transfer. On a system level, the usage of a hierarchical microfluidic cold-plate structure to locally extract heat from a GaN-based converter with 20 individual heat sources in an efficient manner. We show that well-designed microfluidic heat sinks can provide system-level advantages such as higher power density and low pumping power despite the small channel dimensions. At the packaging level, we integrating cooling directly inside the silicon substrate of a GaN-on-Si power IC to eliminate interface and packaging thermal resistances, combined with new packaging concepts based on additive manufacturing and coolant-delivery PCBs. Using in-chip liquid cooling, a 7.5-fold increase in power density was obtained compared to commercially available systems. To reduce convective thermal resistance, a new GaN device manufacturing method is presented where microfluidic cooling and electronics are co-designed, resulting in a monolithically-integrated 3-dimensional manifold microchannel heat sink within the silicon substrate. Heat fluxes up to 1.7 kW/cm2 could be extracted within a compact form factor at low pressure drops and limited pumping power. To facilitate the commercialization, we developed a GaN-on-Si substrates with epitaxially-integrated cooling. This substrate can be considered as a drop-in replacement for traditional GaN-on-Si wafers onto which devices can be fabricated, that offers the benefits of microfluidic cooling without requiring a change in foundry process. Finally, a comparison is made between single-phase water cooling and two-phase flow boiling using R1233ZD(E) as a refrigerant. A benchmark is presented that shows comparable cooling efficiencies for single-phase cooling using co-designed manifold microchannel heat sinks. The benchmark and breakdown of thermal resistance presented in each chapter function as a reference for deciding which level of microfluidic cooling is required for a given application. The high cooling performance demonstrated in this thesis confirms that microfluidic cooling for GaN ICs may become an interesting thermal management technology for certain demanding applications.POWERLA

    GaN vertical power devices on silicon substrates

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    Gallium Nitride (GaN) is a wonder material which has widely transformed the world by enabling energy-efficient white light-emitting diodes. Over the past decade, GaN has also emerged as one of the most promising materials for developing power devices which can operate at significantly higher power densities, higher temperatures, and higher frequencies, thanks to inherently superior material properties like higher bandgap, 10x higher critical electric field, and 3x higher electron saturation velocity, compared to silicon. Lateral GaN high electron mobility transistors (HEMTs) based on the AlGaN/GaN heterostructures capable of switching at high frequencies over 10 MHz have been already commercialized and are the device of choice for implementing modern-day adapters and for wireless charging solutions. However, for high-voltage and high-current applications, it is envisaged that vertical GaN power devices will play a crucial role given that these devices dont scale in size for increasing the BV unlike HEMTs, and are not affected by surface trap related reliability issues. The main bottleneck towards the commercialization of vertical GaN devices on bulk GaN substrates is the high cost and small size availability of these substrates. Similar to lateral GaN HEMTs, GaN epitaxial layers grown on silicon substrate could also become a game-changer for vertical GaN power devices considering that silicon substrates are significantly cheaper and are available in large sizes up to 12-inch diameters which can greatly accelerate viable commercialization. However, there are several roadblocks arising from the growth as well as fabrication perspective that has limited the demonstration of high-performance power devices on GaN-on-Si. In this thesis, we discuss the key hindrances and our solutions for improving the feasibility of GaN-on-Si vertical power devices. All the necessary fabrication steps were first optimized from scratch to develop state-of-the-art power devices. As a first demonstration, we could develop a GaN p-i-n diode with an ultra-low Ron,sp of 0.33 mohmcm2 and record BV of 820 V with a voltage blocking GaN layer of just 4 um. A quasi-vertical MOSFET was then demonstrated for the first time on GaN-on-Si platform with excellent ON- and OFF-state performances. We then probed the limits of current crowding, a main deterrent to the current up-scaling of quasi-vertical devices by exploring large area quasi-vertical MOSFETs. A novel and robust method for achieving a fully-vertical design for GaN-on-Si devices was developed which led to an exemplary improvement in the ON-state performance of quasi-vertical MOSFETs. Device integration has been identified by many leading power semiconductor companies as the way forward due to significant advantages to be had, as a result of lower parasitics and simplified packaging. Taking a cue from these developments, we demonstrated vertical GaN power MOSFETs with integrated freewheeling diodes and reverse blocking capability as described in Chapter 4. In the last chapter, we introduce p-type NiO as a possible substitute for p-GaN for realizing high-performance p-i-n diodes and as junction termination extensions (JTEs) for Schottky barrier diodes. Our initial results point to a strong future for p-NiO to be used for realizing a myriad of reliable GaN power devices.POWERLA

    Heterostructure design and field management in III-N high-electron mobility electronic devices

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    III-N family of materials has offered multiple groundbreaking technologies in the field of optoelectronics and high-power radio-frequency (RF) devices. Blue light-emitting diodes (LEDs) have revolutionized low-energy lighting. Gallium nitride (GaN) RF market is projected to reach 2 billion US\$ by 2025, driven by the defense and telecom applications (namely, 5G). Since a few years, a relatively new field of GaN power electronics is actively growing and just entering the consumer market. The main applications are fast smartphone chargers, automotive, data center, and aerospace. GaN high-electron-mobility (HEM) transistor (HEMT) is the major GaN-based power device commercially available nowadays. The high breakdown field of GaN together with the enhanced mobility offered by the high-electron-mobility heterostructure offers numerous advantages over existing Si-based devices. GaN HEMTs are significantly smaller than their Si counterparts and, thus, switch faster. Increased switching frequency allows to drastically reduce the converter size as well as switching power loss. Thus, GaN-based power devices pave the way to future efficient power conversion technologies. Multi-channel III-N heterostructures are the next step towards the ultimate optimization of a GaN HEMT. By vertically stacking multiple HEM channels one can significantly reduce the ON-resistance of the devices without sacrificing voltage blocking performance, thus, surpassing the fundamental trade-off between ON-resistance and breakdown voltage. In this thesis, we present a detailed analysis of the design principles of multi-channel high electron mobility heterostructures. We provide analytical tools to fine-tune carrier concentrations in each of the multiple channels to achieve the optimal carrier distribution profile for a given application. Based on the analysis presented, we develop a novel device concept - intrinsic polarization super-junction (iPSJ) diode. We demonstrate numerically and analytically that single-channel iPSJ fully decouples the ON-state conductivity from the OFF-state, alleviating the trade-off between the ON-resistance and breakdown voltage. Further, we apply the same concept to a multi-channel (MC) stack. We propose MC-iPSJ devices that surpass the existing GaN HEMT material limit. The technology presented offers a robust platform compatible with current commercial fabrication techniques. The multi-channel requires gate and access regions patterned with nanowires to ensure efficient depletion by the gate and optimal field distribution in the access region. We perform a thorough experimental and analytical study of electrical properties of top-down etched GaN HEMT nanowires that shed light on the strategies to achieve normally-off behavior and optimize the passivation of tri-gated HEMTs. Finally, we explore an alternative gating technique for the multi-channel stack-in-plane gate (IPG), offering advantages in terms of gate capacitance for potential RF applications. We experimentally demonstrate a multi-channel in-plane gate transistor being 3.5-times more conductive than its single-channel counterpart advancing the state-of-the-art. This thesis presents a complete overall study of multi-channel heterostructures, along with specific field management and gating techniques required for this new technology. The experimental results and analytical tools presented provide a solid basis for the future optimization of MC-HEMTs.POWERLA

    New ultrahigh-speed device concepts: from THz nanoplasma devices to glass-like electronics for neuromorphic computation

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    There is a never-ending push for electronic systems to provide faster operation speeds, higher energy efficiencies, and higher power capabilities at smaller scales. These requirements are apparent in different areas of electronics, from radiofrequency (RF) to logic and power electronic systems. For instance, a faster operation would result in communication links with higher capacities, logic circuits with higher processing speeds, and more compact power converters. Metal-oxide-semiconductor (MOS), as the main platform for electronics so far, has enabled a variety of functional devices with applications in our everyday lives. The speed, power delivery, energy consumption, and size of MOS-based devices, however, are constrained by fundamental properties of semiconductor materials. For example, the trade-off between electron density and mobility limits the current density of semiconducting channels, resulting in a power-frequency trade-off in active devices, and the thermionic subthreshold-slope limit imposed by Boltzmannâ Tyranny constrains their minimum supply voltage and ultimately their power consumption. Besides the intrinsic properties of materials, the interfaces (e.g. metal-semiconductor junctions) in classic devices also limit the performance of electronics. For example, the contact resistance of metal-semiconductor tunneling junctions severely constrain the high-frequency performance of diodes and transistors in the millimeter and sub-millimeter bands, and short-channel effects in MOS-based devices restrict downscaling of transistors, which hinders the extreme integration in logic circuits. This thesis tackles some of the most fundamental challenges in different areas of electronics, with a focus on high-speed devices. The first part of the thesis is dedicated to high-speed radiofrequency electronics, where two new device concepts are proposed: electronic metadevices and nanoplasma switches. Electronic metadevices operate based on collective and controllable electromagnetic interactions in deep-subwavelength scales, as an alternative to controlling the flow of electrons. The proposed devices overcome some the theoretical limits in classical electronic devices such as diodes and transistors. Electronic switches realized based on this new concept enable achieving very high cutoff frequency figure-of-merit (FOM) exceeding 10 THz, very low losses with ultra-small contact resistances below 20 â Š ÎŒm, and large breakdown voltages over 30 V, extending state-of-the-art by two orders of magnitude. Based on this new device concept, two-port and three-port ultrahigh-speed modulators operating in the THz band are demonstrated. In the second chapter, the common drawback of power-frequency trade-off in semiconductor devices which ultimately leads to the terahertz gap, is tackled by proposing ultrafast nanoplasma devices â new electronic switches operating based on plasma formation in nano-gaps. Nanoplasma switches offer current densities over 300 A mmâ 1 and switching speeds over 10 V psâ 1. A compact nanoplasma-based terahertz source capable of generating peak powers above 1 W at 300 GHz is demonstrated. This new concept sets the stage for the future ultrafast electronics with applications in terahertz sources and modulators, relying only on a single metal layer. Nanoplasma devices are compatible with any kind of electronic platforms, from CMOS and III-V to flexible electronics. High-speed logic electronics is concerned in the second part ofPOWERLA

    Hard and Soft Switching Losses in Power Converters: Role of Transistor Output Capacitance

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    To best utilize power converters, a sound understanding of the relationship between the circuit topology and the power-semiconductor-device characteristics is required. This is especially important in high-frequency switching, where device parasitics start to largely interfere with the circuit. In this regard, the parasitic-output-capacitance of power devices plays a vital role in the losses of the system, which affect both the efficiency of the circuit and the system volume. This thesis studies the characterization of output capacitance as well as its interaction with power electronic topologies at a fundamental level and presents important insights, underlining limitations in the conventional knowledge on the subject. The thesis shows that the analysis of output-capacitance-related losses should be treated based on the type of switching employed, as the circuit-level effect of the output capacitance is different in soft- and hard-switching topologies. For both cases, it is highlighted that the charge-versus-voltage curve of device output capacitance provides the most complete information of its behaviour. First, the correct measurement methods to identify output capacitance losses for soft-switching operations are analysed and validated. Then, it is shown how a fundamentally different charge-discharge mechanism in device output capacitance takes place in hard-switching operation (in contrast to soft-switching), and a new measurement approach is devised to quantify the related loss. These measurement methods are then used to evaluate output-capacitance losses of commercially available Si, SiC, and GaN power transistors. The developed concepts are taken a step further and utilized to separately evaluate gate- and driver-related losses in driving a transistor undergoing zero-voltage-switching. The technique is then used to identify the performance limitations of HF and VHF gate-driver ICs. Finally, consolidating the ideas developed throughout the thesis, an experimental case study is provided for a soft-switching converter. We conclude that output capacitance is a critical device feature that should be considered in high-frequency converter design and be given the same level of attention as device on-resistance in the design stage of a device. We believe this is instrumental to the progress of modern power convertersâ especially, ones based on emerging wide-bandgap devicesâ towards their fullest potential.POWERLA

    Pushing the Limits of Efficiency and Power Density in High-Frequency Power Conversion Based on Wide-Band-Gap Technologies

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    The emergence of wide-band-gap (WBG) power transistors with low conduction losses and high-speed switching speeds has paved the way for more-than-ever efficient power electronics systems and huge energy saving potentials. Likewise, power density- the ratio of power to volume (or weight)-can be significantly increased in power converters based on gallium nitride (GaN) and silicon carbide (SiC) transistors. Converters with high efficiencies and large power densities are essential to forthcoming applications such as electric aircrafts, hyperloop transportation systems and DC grids. Nonetheless, major barriers for realizing such converters are: Lack of important information in datasheets and models from WBG device manufacturers, and huge diversities in the performance of WBG transistors based on different GaN and SiC technologies. Shortcomings of existing tools for accurate system-level and component-level performance analysis and loss measurement in efficient power converters at high-frequency (HF) and very-high-frequency (VHF) domains. Necessity to enhance traditional converter topologies for compatibility with WBG devices, by designing high-quality magnetics and implementing novel control strategies to maximize their efficiency and power density, which are typically two opposing objectives. Thesis in Chapter 2 focuses on accurate methods for voltage and current rise rate measurements of high-speed GaN and SiC transistors for pulsed-power applications, highlighting the effect of different parameters on the device switching speed. Next, we propose measurement methods for evaluation of gate loss, conduction and dynamic ON-resistance degradation loss and output capacitance loss in soft-switched WBG transistors for frequencies of up to 40 MHz, providing an insightful performance comparison between various SiC and GaN technologies for HF and VHF resonant and quasi-resonant power converters. High-quality magnetic components, namely inductors and transformers, are inseparable building blocks of efficient power converters. Chapter 3 is dedicated to characterizing magnetics in the HF domain, with an overview of different loss evaluation methods. Chapter 4 proposes advanced calorimetric techniques: First, a novel dual-chamber calorimeter with an unprecedented measurement accuracy and range is proposed for sensitive loss measurements in power electronics building blocks (e.g., HF inductors and transformers) and efficiency evaluations in highly-efficient converters where electrical measurements are prone to large errors. Next, a thermal method based on temperature mapping is presented, suitable for assessment of losses and their distribution in HF and VHF power circuits. Improved DC-DC topologies for efficient operation at HF are the subjects of Chapter 5. An enhanced dual-active-bridge (E-DAB) topology is proposed for efficiency preservation over wide voltage gains, achieving a peak efficiency of 97.4% and a power density of 10 kW/l. By applying a new operation mode based on impulse rectification, traditional boost converters can achieve zero-voltage switching. Thanks to several optimizations in magnetics design, device selection, layout and control, a converter with an outstanding peak efficiency of 98.6% and a power density of 52 kW/l is realized. The thesis provides insights for power electronics designers and device engineers to push the limits of conversion efficiency and power density to the maximum using WBG technologies.POWERLA
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