414 research outputs found
Dual-gated WTe2/MoSe2 van der Waals tandem solar cells
No full textWe propose and numerically investigate, through a multiscale approach, a tandem solar cell based on a van der Waals heterostructure comprising of two monolayers of transition-metal dichalcogenides. The electronic connection between the two subcells is obtained via tunneling through the van der Waals heterojunction, which is electrostatically controlled by means of a dual gate. Furthermore, by adjusting the dual-gate voltages, the photocurrents in the two subcells can be matched and the tandem cell performances can be optimized. Assuming an optimal absorptance, as expected in light-trapping systems, we predict that a power conversion efficiency of 30.7%, largely exceeding that of the single subcells, can be achieved. The proposed design being suitable for other van der Waals heterojunctions shows that it represents a viable option for future high-efficiency photovoltaic system
Efficient Quantum Mechanical Simulation of Band-to-band Tunneling
No full textIn this work, we extend an already existing simulator for tunnel FETs to fully take into account nonparabolicity (NP) of the conduction band in all aspects, namely the wavefunction (WF) and density of states (DOS) corrections for both charge and BTBT current calculation. Comparison against more advanced full-quantum simulators based on TB and k · p Hamiltonians is presented as well and indicates very good matching between models for simple tunnel diodes. An initial parameter study of the Electron Hole Bilayer TFET (EHBTFET) indicates the presence of an optimum channel thickness, determined by the interplay between the subband alignment voltage and ON current level
Countdown Slack: A Run-Time Library to Reduce Energy Footprint in Large-Scale MPI Applications
No full textThe power consumption of supercomputers is a major chal-
lenge for system owners, users, and society. It limits the capacity of
system installations, it requires large cooling infrastructures, and it is the
cause of a large carbon footprint. Reducing power during application
execution without changing the application source code or increasing
time-to-completion is highly desirable in real-life high-performance com-
puting scenarios.
The power management run-time frameworks proposed in the last
decade are based on the assumption that the duration of communication
and application phases in an MPI application can be predicted and used
at run-time to trade-off communication slack with power consumption.
In this manuscript, we first show that this assumption is too general and
leads to mispredictions, slowing down applications, thereby jeopardizing
the claimed benefits. We then propose a new approach based on (i) the
separation of communication phases and slack during MPI calls and
(ii) a timeout algorithm to cope with the hardware power management
latency, which jointly makes it possible to achieve performance-neutral
power saving in MPI applications without requiring labor-intensive and
risky application source code modifications. We validate our approach
in a tier-1 production environment with widely adopted scientific appli-
cations. Our approach has a time-to-completion overhead lower than
1% , while it successfully exploits slack in communication phases to
achieve an average energy saving of 10% . If we focus on a large-
scale application runs, the proposed approach achieves 22% energy
saving with an overhead of only 0.4% . With respect to state-of-the-art
approaches, COUNTDOWN Slack is the only that always leads to an
energy saving with negligible overhead ( < 3% )
Phonon-limited and effective low-field mobility in n- and p-type [100]-, [110]-, and [111]-oriented Si nanowire transistors
No full textUltrascaled n- and p-type Si nanowire field-effect transistors (NW FETs) with [100], [110], and [111] as channel orientations are simulated in the presence of electron-phonon scattering using an atomistic quantum transport solver based on the sp(3)d(5)s* tight-binding model for electrons and holes, a modified Keating model for phonons, and the nonequilibrium Green\u27s function formalism. The channel resistances of devices with different gate lengths and carrier concentrations are computed at room temperature and used to extract phonon-limited, ballistic, and effective low-field mobilities. It is found that a [110] channel represents the best choice for high n- and p-type NW FET performances. (c) 2011 American Institute of Physics. [doi:10.1063/1.3540689
Enhancement of Thermoelectric Efficiency by Uniaxial Tensile Stress in n-type GaAs Nanowires
No full textThe thermoelectric power-factor (PF) and efficiency (ZT) of GaAs nanowires (NWs) can be improved by (i) choosing a proper wire growth and channel orientation, (ii) by applying uniaxial tensile stress, and (iii) suitable wire cross-section size. In this work we study the impact of these three factors on the PF and the ZT. Tensile stress, channel direction and cross-section size allows bandstructure engineering to tune the electronic conductance (G) and the Seebeck coefficient (S). [110] GaAs NWs grown on (111) surface provide maximum PF (3X) and ZT (1.3X) compared to [100]/(100) NWs, which can be attributed to the G enhancement induced by the L valley contribution under strain
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