2,718 research outputs found
A flexible FPGA implementation for illuminance–reflectance video enhancement
No full textAbstract: Digital cameras, new generation phones, commercial TV sets and, in general, all modern devices for image acquisition and visualization can benefit from algorithms for image enhancement suitable to work in real time and preferably with limited power consumption. Among the various methods described in the scientific literature, Retinex-based approaches are able to provide very good performances, but unfortunately they typically require a high computational effort. In this article, we propose a flexible and effective architecture for the real-time enhancement of video frames, suitable to be implemented in a single FPGA device. The video enhancement algorithm is based on a modified version of the Retinex approach. This method, developed to control the dynamic range of poorly illuminated images while preserving the visual details, has been improved by the adoption of a new model to perform illuminance estimation. The video enhancement parameters are controlled in real time through an embedded microprocessor which makes the system able to modify its behavior according to the characteristics of the input images, and using information about the surrounding light conditions
Integrated video motion estimator with Retinex-like pre-processing for robust motion analysis in automotive scenarios: algorithmic and real-time architecture design
No full textThe paper presents a novel technique for robust motion analysis in real automotive scenarios based on integrated Retinex-like pre-processing algorithm with block matching video motion estimator. Both algorithmic and real-time hardware design issues are discussed. The benefits of the proposed technique are manifold: the entire system is more robust; the estimated motion vectors are more reliable and less dependent on critical ambient conditions like shadows or flashes; the proposed algorithm may allow to perform motion estimation using very few bits and running as a 2- or 1-bit transform, still maintaining good performances. Real-time hardware implementation is achieved by design and synthesis in 65 nm CMOS standard-cells technology of an Application Specific Instruction-set Processor. Design optimizations for both the processing core and the memory organization are presented. With respect to the state of the art the proposed hardware implementation ensures bounded circuit complexity, low power consumption and reprogrammability of the technique
On reduced-complexity approximations of quadratic filters
No full textAmong the various mathematical representations of nonlinear systems, a popular description is given by means of the discrete-time Volterra series. In this paper we first briefly review the relevant nonlinear system identification techniques, with reference in particular to nonlinear systems with lengthy memory. In such cases, a parallel-cascade structure has been proved to be very effective since it is able to provide an arbitrarily close approximation, in the mean square error (MSE) sense, for a broad class of systems to be modelled. The parallel-cascade structure is indeed an exact representation for a quadratic filter, obtained by means of a matrix decomposition technique: we recall such a technique and then we show how it is possible to apply it for the adaptive identification of quadratic systems with large time delay
A VLSI implementation of a reconfigurable rational filter
No full textWe propose an implementation of a reconfigurable system which exploits the features and the robustness of rational filters in order to accomplish various image processing tasks. This particular architecture is able to implement various different algorithms as noise-smoothing edge preserving filtering, interpolation, blocking artifacts removal. The architecture is structured as a bit-level pipeline and can work at frequency of 200 MHz, maintaining a quite small size of 7×5 mm
Color rendering in high dynamic range images
No full textIf a photograph is reproduced “faithfully”, i.e. preserving the relative colorimetric values of the original scene, the resulting image will often look less colorful and less contrasted than the original scene due to some mechanisms of the human visual system. Film and digital cameras must compensate these effects in order to obtain visually pleasing images, which reproduce the appearance of the original scene. This problem occurs also in high dynamic range (HDR) photography, and tone mapped images may appear slightly hazy if the aforementioned visual effects are not compensated. In this paper we shall briefly recall the technique used by most cameras (both film-based and digital) and show one possible theoretical motivation based on a model of brightness perception. We shall then propose a simple technique which compensates the loss of colorfulness and contrast in tone mapped images, and show in particular how this technique can be combined with a tone mapping operator we recently proposed. Finally, we shall compare the results with those produced by a related metho
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