1,721,332 research outputs found
Analog front-end design perspective of a 14 nm finFET technology
No full textN-and P-type transistors from a 14 nm finFET technology have been tested from the standpoint of static current-voltage characteristics, small signal parameters and noise properties in view of analog front-end applications. Device electrical features are found to be compliant with the scaling trend as carried on with planar CMOS technologies. Comparison with standard, less scaled bulk CMOS processes points out that transition from planar, single-gate to vertical, multiple-gate structures does not affect significantly the device analog performance. The paper will focus in particular on the noise properties of the transistors, featuring different gate length and width and operated in the weak to moderate inversion region
Radiation effects on the noise parameters of a 0.18um CMOS technology for detector front-end applications
No full text0.13 um CMOS technologies for radiation hardness analog front-end circuits in LHC upgrades
No full textEvaluation of the radiation tolerance of 65 nm CMOS devices for high-density front-end electronics
No full textTotal Ionizing Dose Effects on the Noise Performances of a 0.13 um CMOS Technology
No full textThis paper presents a study of the ionizing radiation tolerance of 0.13 um CMOS transistors, in view of the application to the design of rad-hard analog integrated circuits. Static, signal and noise parameters of the devices were monitored before and after irradiation with 60Co  gamma-rays at a 10 Mrad total ionizing dose. The effects on key parameters such as threshold voltage shift and 1/f noise are studied and compared with the behavior under irradiation of devices in previous CMOS generations
Forecasting noise and radiation hardness of CMOS front-end electronics beyond the 100 nm frontier
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Selection criteria for P- and N-channel JFETs as input elements in low-noise radiation-hard charge preamplifiers
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