1,721,017 research outputs found
A fixed-point parallel convolver without precision loss for the real-time processing of long numerical sequences
A parallel architecture, able to convolve in real-time long numerical sequences with long filter functions is shown. Real-time is intended as a processing made at the same frequency of the data input access with a minimum delay of the output production, in order to make the output immediately available during the input process. We have used a known scheme that assumes one processing element (PE) for each point of the filter sequence. This architecture is systolic and very modular. Input data are broadcasted in parallel on every PEs; shift registers are used to store the data as they are computed. Two interleaving levels are introduced. They have several advantages, by allowing a fixed-point data representation without precision loss, In this way, a very short "first-input-access/first-output-production" delay is obtained. The feasibility of the proposed architecture in the VLSI technology and its performance have been verified by a silicon compiler/simulator
A Two-Level Interleaving Architecture for Serial Convolvers
In this correspondence, se present a bit-serial architecture for convolving/correlating long numerical sequences by long filter functions. Because of its two-level interleaving structure, the proposed device does not require "wait cycles" between consecutive input samples. As a result, it achieves the highest possible throughput. Cascadability, fault tolerance, feasibility in VLSI technology, and computing performances are discussed and analyzed
On-the-Fly Pipelined Convolver
An architecture for on-the-fly convolving of long numerical sequences with long filter functions is proposed. The purpose of on-the-fly computation is to allow processing to proceed at the same frequency as data input access (without requiring wait cycles) with a minimum latency period, so that the output can be immediately available during the input process
Two fast architectures for the direct 2-D discrete wavelet transform
In this paper, we propose two architectures for the direct two-dimensional (2-D) discrete wavelet transform (DWT), The first one is based on a modified recursive pyramid algorithm (MRPA) and performs a "nonstandard" decomposition (i.e., Mallet's tree) of an N x N image in approximately 2Na(2)/3 clock cycles (ccs), This result consistently speeds up other known architectures that commonly need approximately Na ccs, Furthermore, the proposed architecture is simpler than others in terms of hardware complexity.
Subsequently, we show how "symmetric"/"anti-symmetric" properties of linear-phase wavelet filter bases can be exploited in order to further reduce the VLSI area. This is used to design a second architecture that provides one processing unit for each level of decomposition (pipelined approach) and performs a decomposition in approximately N-2/2 ccs, In many practical cases, even this architecture is simpler than general MRPA-based devices (having only one processing unit)
DiSS – Diagnostics for Solar Systems Software pEar la diagnosi automatizzata di moduli fotovoltaici basata su immagini all’infrarosso
E' ben noto che i moduli fotovoltaici hanno una bassa efficienza. Essa, infatti, va dall’8% al 18%, a seconda del materiale utilizzato (a base di silicio, film sottile, ecc.), e quindi, la sua diminuzione (anche di pochi punti percentuali) influenza fortemente l’efficienza complessiva dell’intero impianto.
È noto anche che “quasi” sempre l’efficienza è in relazione inversa con la temperatura della cella, quindi una sovra-temperatura ne provoca una diminuzione. Inoltre, poiché le celle di un modulo fotovoltaico sono collegate in serie, il malfunzionamento di una ha ripercussioni sulle prestazioni dell’intero modulo fotovoltaico... ma quali sono le cause di mal funzionamento di una cella fotovoltaica?
Le anomalie delle celle fotovoltaiche sono dovute o al processo produttivo (process-induced) o al materiale utilizzato (material-induced), ma in ogni caso si manifestano come sovra-temperatura: per questo motivo, le tecniche diagnostiche basate sulla termografia stanno riscuotendo notevole successo. Tuttavia, non sempre le immagini termiche consentono di definire univocamente lo stato di salute del modulo, sia perché le termocamere hanno una risoluzione relativamente bassa (640x480 pixel è considerata già alta risoluzione), sia perché le informazioni di un’immagine termica sono prettamente qualitative. Inoltre, le immagini termiche a volte sono affette da “rumore”, quindi non è facile distinguere un sovra-riscaldamento reale da uno apparente, tanto che in questi casi si rende necessario anche un pre-processamento delle immagini all’infrarosso, al fine di effettuare la valutazione su un’immagine “ripulita”.
Lo scopo di questo lavoro è proporre un innovativo workflow diagnostico per moduli fotovoltaici in silicio cristallino basato su immagini termografiche, ideato dal Prof. Silvano Vergura del Politecnico di Bari.
Allo scopo di automatizzare il processo diagnostico, gli step del workflow, illustrati dettagliatamente nel seguito dell’articolo, sono stati implementati in una piattaforma software (DiSS), dalla Spin-off APIS del Politecnico di Bari, sotto la supervisione dello stesso Prof. Vergura. Infatti, pur se poche informazioni devono necessariamente essere inserite dall’operatore (parametri ambientali, soglie critiche per la classificazione delle celle, ecc.), ad un PC si può demandare la quasi totalità delle operazioni, dall’elaborazione delle termo-immagini fino alla generazione automatica di un report recante la diagnosi di ogni singola cella del modulo, in forma sia grafica che numerica.
Tutto ciò comporta una drastica riduzione dei tempi di analisi con grande beneficio dell’operatore
JASTEG2000: Steganography for JPEG2000 Coded Images
The steganography is the concept of making invisible a communication, and not only incomprehensible its content (as cryptography does). This is generally achieved hiding a secret message into another one ("cover"), which appears as the only object of the communication. This paper proposes a steganographic method employing JPEG2000 images as "cover". It reaches high embedding even introducing a low distortion. Experimental results have shown up to 35%-45% embedding rate, with 2 dB of distortion (in the worst case) at 0.5 bpp and 30%-40% with less than 4 dB at 1.0 bpp. Comparing these results with those achieved by JPEG2000-BPCS, it can be seen that our method produces considerably less post-embedding growth and distortion (in some case, they differ for more than 5 dB)
High-Speed/Low-Power 1-D DWT Architectures with High Efficiency
In this paper, we propose two scalable architectures (called ArcJ and Arc*2) which perform the Discrete Wavelet Transform (DWT) of an N0-sample sequence in only N0/2 clock cycles. Therefore, they are at least twice as fast as the known architectures. Also, their AT2 parameter is approximately 1/2 of that of already existing devices. These results allow either a twice faster processing than that allowed by other architectures working at the same clock frequency (High-Speed utilization), or using a twice lower clock frequency, while reaching the same performance as other architectures. This second possibility permits reducing the power dissipation by a factor of 4 with respect to other architectures (Low-Power utilization). Finally, we shall show that an impressively efficient architecture can be defined as the synthesis of ArcJ and Arc*2 (average efficiency = 99.1%, minimum efficiency = 93.8%)
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