62 research outputs found
Normal cones and --convex structure
summary:The notion of normal cones is used to characterize --convex algebras among unital, symmetric and complete -convex algebras
Use of interleaving and error correction to infrared patterns for the improvement of position estimation systems
A mapping algorithm for computer-assisted exploration in the design of embedded systems
We present a technique for automatic exploration of architectural alternatives in the design of complex electronic embedded systems and systems-on-a-chip. The technique transforms the problem into a set of simple model-to-model operations and a mapping algorithm that becomes the core of the entire design process. The mapping algorithm is formulated as an assignment-type problem (ATP), which is, in turn, solved by a straightforward optimization method. The result is a design assistance tool, which is demonstrated through a telecommunication systems example.</jats:p
Electronic distortion compensation in the mitigation of optical transmission impairments: the view of joint project on mitigation of optical transmission impairments by electronic means ePhoton/One+ project
Estimating the design and development cost of electronic items
This thesis is concerned with understanding the issues in generating cost estimates at the conceptual design stage for Embedded Systems Design and Development (ES D&D), based on specifications. The research examines if there are any relationships between the system’s specifications and the system’s cost, and if these relationships can be formalised. The aim is to develop a framework that will structure, formalise and improve the ES D&D Cost Estimating process.
Literature review examines current situation regarding ES D&D Cost Estimating and the information requirements for generating cost estimates. The review identifies that research concentrates on Embedded Systems manufacturing cost estimation, there is a lack of research regarding D&D cost estimation, as well as on the information requirements for generating D&D cost estimates.
By conducting an industrial survey, the author identifies the internal practice on ES D&D Cost Estimating for the automotive and aerospace industries and identifies trends, commonalties and differences within and between them. The survey establishes that in order to improve the ES D&D Cost Estimating process, it is essential to establish a data infrastructure that will avoid issues with shortage of information imposed by suppliers and will link the Embedded System’s specifications with the system’s actual implementation and expected functionality.
Using a case study approach, the author also establishes that it is essential to analyse the product functionality in such a way that will enable the development of a detailed cost estimating framework at the specification’s design stage. The framework is developed in three parts for hardware, software and integration and reuse. The ES hardware design and development effort is predicted using a complexity based cost estimating approach. The research has demonstrated that Use Case Points can be used to predict software development effort for ES software development when the specification is expressed as use cases. In case of statechart based specifications, the development effort is predicted, like in the case of Hardware, using a complexity based cost estimating approach. The study then investigates factors that affect Integration and Reuse effort for ES D&D. The Integration and Reuse effort is predicted using a expert judgement based methodology.
The developed results provide automotive industry with a structured, consistent approach to develop cost estimates for the ES D&D Cost at the specifications design stage. The approach contributes towards improvement of the cost estimating practice within the automotive industry
A hardware/software co-design methodology for embedded telecommunication systems
International audienceThe current paper presents an integrated co-design methodology for embedded telecommunication systems, starting from high-level system modelling down to system implementation. The proposed co-design methodology uses a system specification captured in UML language, translates at a simulatable SDL description used as input to the COSMOS toolset for the generation of a virtual hardware/software prototype. The system's partitioning is achieved interactively in a semi-automatic way, based on COSMOS and its underlying SOLAR format, producing C and VHDL descriptions for the implementation of software and hardware parts respectively. For the co-simulation, synthesis and system implementation parts of the proposed methodology, the CoWare tool has been employed using as front end the generated C and VHDL descriptions produced by COSMOS. The effectiveness of the proposed co-design approach is demonstrated through its application for the design and implementation of the Medium Access Control (MAC) layer and the RF I/F part of the Physical (PHY) layer of the DECT protocol stack
Design of a Multi-purpose Surface-EMG Readout System for Draft Control Applications
This paper presents current work on the design of a multi-purpose surface-electromyography (EMG) readout system that can be used in various draft controlled applications of low-accuracy (e.g. rehabilitation environments for stroke patients, ambient assisted living for elders, remote control of robotic arm). The proposed system interfaces six low-cost and low-power EMG channels exhibiting pm 1.5 mV sensitivity and 400mV output range. The ADC converters of a microcontroller (i.e. Arduino) platform are used to fetch the analog signal from the read-out system. Digital data is verified after ADC conversion using oscilloscope instruments. The microcontroller is programmed to filter the analog signal and identify its rough changes based on continuously adjustable thresholds. The measured data are transmitted in a flexible digital coded format via the microcontroller's network connectivity hardware to the associated control receiver, which in turn decodes it and performs the associated operation as required by the draft-controlled environment. The current consumption ranges from 330uA to 2.9mA per channel, depending on the type of operational amplifier used. © 2019 IEEE
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