13 research outputs found
Design of a Non-destructive Device Test Platform Capable of Double-pulse Tests and Short-circuit Tests with Fast Overcurrent Protection for Wide Band-gap Devices
No full textObtaining the characteristics of the device is a key procedure before practical applications. Here in this paper, the design of a device test platform for wide-bandgap devices is introduced. The platform has a high noise immunity, low loop inductance, and fast overcurrent protection, realizing a non-destructive operation.</p
Accuracy estimation of low-current voltage drop method for junction temperature monitoring under DC power cycling
Full text linkA thorough accuracy estimation of the well-known low-current voltage drop method is carried out in this paper. A high-performance infrared camera is utilized as the reference in a DC power-cycling test on a commercial IGBT power module. The result shows that the low-current voltage drop method produces generally a higher temperature than the actual, in particular at the bond wire's joint point. However, a simple compensation method with a linear function can be easily adopted to compensate the temperature difference. After compensation, the maximum error of temperature swing is 0.28 °C.</p
In-Operation Junction Temperature Extraction for Cascode GaN Devices Based on Turn-Off Delay
Full text linkIn this article, a method to extract the junction temperature of cascode gallium nitride (GaN) devices based on the turn-off delay is proposed for the first time, together with a possible circuit implementation. We described the method theory at first, which showed good applicability even at low gate-resistor values, allowing avoidance of self-sustained oscillations and extra losses. The circuit implementation has also been presented starting from the design process and ending with a comprehensive experimental campaign. The experimental results show both a good static and dynamic performance and a high repeatability within 0.6 °C. The overall obtained accuracy stays within ±2 °C and the response time is 500 ns, besides, the test results from dc power cycling shows that the accuracy of proposed method will not be affected by aging
Online Junction Temperature Extraction for Cascode GaN Devices Based on Turn-On Delay
No full textWe introduce an innovative method for online junction temperature monitoring in cascode gallium nitride (GaN) devices, utilizing turn-on delay as the temperature sensitive electrical parameter for the first time on this device. The turn-on process is analyzed, and the expression of turn-on delay is derived, pointing out the factors affecting the turn-on delay. Following that, we provide a circuit implementation, along with an explanation of its operational principles. Thanks to the high resolution of the proposed method, a large auxiliary gate resistor used to improve the sensitivity is avoided. Furthermore, the avoidance of large gate resistors prevents triggering the self-sustained oscillations of cascode GaN devices. Finally, a comprehensive experimental verification is carried out. The results show that the proposed method has a short response time of 500 ns, a small static error of 2.3 °C and good dynamic performance. Besides, a dc power cycling was conducted to prove that the accuracy of the proposed method is not affected by device aging, proving its feasibility and applicability in practical applications
Junction temperature monitoring for cascode GaN devices using the Si MOSFET's body diode voltage drop
Full text linkIn this paper, a new online junction temperature monitoring method is proposed for cascode GaN devices using the body diode of Si MOSFET. The reverse current during soft-switching mode is utilized to extract the voltage drop of the Si MOSFET's body diode. It is pointed out that, to accurately obtain the voltage drop of Si MOSFET's body diode, the VDS voltage of cascode GaN device should be measured when the reverse current is small during the dead-time period. An experimental platform has been designed to validate the proposed method. The proposed method exhibits an accuracy within 0.6 °C and a R2 = 0.99 goodness of linear fit on a test Buck converter, showing that this method is practical for real applications.</p
Factors Affecting Self-Sustained Switching Oscillations of Cascode GaN Devices and Mitigation Strategy during Parameter Design
No full textWith the fast development of wide band-gap devices, GaN is occupying a larger market than before. As one of the commercial devices, cascode GaN has shown several advantages. However, its cascode configuration brings oscillation problems. Although some related research has been done, comprehensive experimental tests to analyze the factors affecting self-sustained oscillations have not been conducted so far. In this paper, it is the first time that the effects of gate resistors, gate driving voltages, and snubbers on self-sustained oscillations during both turn-on and turn-off transients are comprehensively and experimentally studied. It is shown that decreasing gate resistors, increasing positive driving voltage, decreasing negative driving voltage, and adding snubber circuits can suppress the self-sustained switching oscillations.</p
Short Circuit Capability and Performance Degradation of Cascode GaN Devices - A Case Study
No full textGallium nitride technology is becoming more popular nowadays and has been widely used to further improve the performance of power converters. As one of the most accessible GaN devices, cascode GaN devices have several advantages. The cascode GaN device is easier to manufacture and the reliability is improved in the semiconductor aspects. However, the short circuit capability has not been deeply studied and the performance degradation after short circuit remains unknown. In this paper, short circuit (SC) tests under different conditions are carried out and the comparison with traditional GaN devices is presented. Finally, the performance degradation after SC test is presented.</p
Design of Active SiC MOSFET Gate Driver for Crosstalk Suppression Considering Impedance Coordination between Gate Loop and Power Loop
No full textIn a phase leg configuration of SiC MOSFETs, the crosstalk threatens the reliable operation of the devices and introduces additional loss. State-of-the-art methods suppressing the crosstalk fails to consider the influence of the gate loop impedance. This paper points out that the gate loop impedance should be carefully designed in terms of the crosstalk elimination, especially for SiC MOSFET with fast switching speed and low threshold voltage. Firstly, an impedance model considering the parasitics of the gate loop is proposed. Then it is pointed out that the crosstalk voltage induced across the impedance of the gate source of the SiC MOSFET is related to the oscillation frequency of the drain source ring voltage, which is decided by the parasitics of the power loop. To effectively eliminate the crosstalk voltage, the gate loop impedance and power loop impedance should be designed coordinately. Finally, a parallel capacitor of the gate source terminal of SiC MOSFET is added during the turn off period and with proposal capacitance selection, the crosstalk voltage is effectively reduced. The proposed analysis and method are experimentally verified through a double pulse test platform
A Guideline for Silicon Carbide MOSFET Thermal Characterization based on Source-Drain Voltage
Full text linkThermal transient measurement based on source-drain voltage is a standard
method to characterize thermal properties of silicon semiconductors but is
doubtful to be directly applied to silicon carbide (SiC) devices. To evaluate
its feasibility and limitations, this paper conducts a comprehensive
investigation into its accuracy, resolution, and stability towards yielding the
structure information of SiC MOSFET using the source-drain voltage as the
temperature sensitive electrical parameter. The whole characterization process
involves two main procedures and associated key testing parameters, such as
gate voltages, sensing and heating currents, etc. Their impacts on both the
static and dynamic performances are also investigated with the aim of providing
a guideline for conducting a reproducible thermal transient measurement for SiC
MOSFETs
