3,585 research outputs found

    A Rail-To-Rail Class-AB Amplifier With an Offset Cancellation for LCD Drivers 

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    [[abstract]]A rail-to-rail amplifier with an offset cancellation, which is suitable for high color depth and high-resolution liquid crystal display (LCD) drivers, is proposed. The amplifier incorporates dual complementary differential pairs, which are classified as main and auxiliary transconductance amplifiers, to obtain a full input voltage swing and an offset canceling capability. Both offset voltage and injection-induced error, due to the device mismatch and charge injection, respectively, are greatly reduced. The offset cancellation and charge conservation, which is used to reduce the dynamic power consumption, are operated during the same time slot so that the driving period does not need to increase. An experimental prototype amplifier is implemented with 0.35-mu m CMOS technology. The circuit draws 7.5 mu A static current and exhibits the settling time of 3 mu s, for a voltage swing of 5 V under a 3.4 k Omega resistance, and a 140 pF capacitance load with a power supply of 5 V. The offset voltage of the amplifier with offset cancellation is 0.48 mV.[[note]]SC

    0.10 V rail-to-rail constant g(m) CMOS amplifier input stage

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    [[abstract]]Presented is a 0.9 V rail-to-rail constant g(m) CMOS amplifier input stage consisting of complementary differential pairs and a g(m) control circuit. The g(m) control circuit eliminates the g(m) dead zone, which occurs in the conventional rail-to-rail amplifier with ultra-low supply voltages. The proposed amplifier input stage has a constant g(m) that varies by +/- 2.3% for rail-to-rail input common-mode levels. To verify the proposed amplifier design, an experimental prototype operational amplifier is also implemented using 0.35 mu m standard CMOS technology.[[note]]SC

    2 V rail-to-rail constant-g(m) CMOS op amp

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    [[abstract]]A 1 V rail-to-rail constant-g(m) CMOS operational amplifier is proposed. This study shows that keeping the sum of currents in the complementary differential pairs constant rather than controlling the tail currents produces a constant-g(m) input stage operating in the weak inversion. The currents in the n-channel differential pair are regulated to keep the sum of currents in the complementary differential pairs constant using a negative feedback loop. This study also provides experimental results obtained from a 0.35 mu m CMOS prototype chip.[[note]]SC

    A 10-bit LCD column driver with piecewise linear digital-to-analog converters 

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    [[abstract]]A 10-bit LCD column driver, consisting of piecewise linear digital to analog converters (DACs), is proposed. Piecewise linear compensation is utilized to reduce the die area and to increase the effective color depth. The data conversion is carried out by a resistor string type DAC (R-DAC) and a charge sharing DAC, which are used for the most significant bit and least significant bit data conversions, respectively. Gamma correction voltages are applied to the R-DAC to fit the inverse of the liquid crystal transmittance-voltage characteristic. The gamma correction can also be digitally fine-tuned in the timing controller or column drivers. A prototype 10-bit LCD column driver implemented in a 0.35-mu m CMOS technology demonstrates that the settling time is within 3 mu s and the average die size per channel is 0.063 mm(2), smaller than those of column drivers based exclusively on R-DACs.[[note]]SC

    1.5 V large-driving class-AB buffer amplifier with quiescent current control

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    [[abstract]]A 1.5 V large-driving class-AB buffer amplifier with quiescent current control suitable for output driver application is proposed. An experimental prototype buffer demonstrated that the circuit draws only 80 muA static current, and exhibited the rise time of 0.4 mus and fall time of 1 mus under a 100 Omega//150 pF load.[[note]]SC

    High-speed driving scheme and compact high-speed low-power rail-to-rail class-B buffer amplifier for LCD applications 

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    [[abstract]]A high-speed driving scheme and a compact high-speed low-power rail-to-rail class-B buffer amplifier, which are suitable for small- and large-size liquid crystal display applications, are proposed. The driving scheme incorporates two output driving stages in which the output of the first output driving stage is connected to the inverting input and that of the second driving stage is connected to the capacitive load. A compensation resistor is connected between the two output stages for stability. The second output stage is used to improve the slew rate and the settling time. The buffer draws little current while static but has a large driving capability while transient. The circuit achieves the large driving capability by employing simple comparators to sense the transients of the input to turn on the output stages, which are statically off in the stable state. This increases the speed of the circuit without increasing static power consumption too much. A rail-to-rail folded-cascode differential amplifier is used to amplify the input signal difference and supply the bias voltages for the second stage. An experimental prototype output buffer implemented in a 0.35-mum CMOS technology demonstrates that the circuit draws only 7-muA static current and exhibits the settling times of 2.7 mus for rising and 2.9 mus for failing edges for a voltage swing of 3.3 V under a 600-pF capacitance load with a power supply of 3.3 V. The active area of this buffer is only 46.5 x 57 mum(2).[[note]]SC

    Low-power high-speed class-AB buffer amplifiers for liquid-crystal display signal driver application 

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    [[abstract]]Two types of low-power, high-speed, but with a large input dynamic range and output swing class-AB output buffer amplifiers which are suitable for the liquid-crystal display signal driver application are proposed. The driving capabilities of the circuits are achieved by adding comparators which sense the rising and falling edges of the input waveform and then turn on an auxiliary driving transistor to help charging/discharging the output load. The auxiliary driving transistors stay at "off" in the stable state, thus drawing no static power. Hence, the buffers draw little current during static but have an improved driving capability during transients. They are demonstrated in a 0.6 mum CMOS technology. The measured data do show that the proposed output buffer circuits are very suitable for the application of liquid-crystal display signal driver.[[note]]SC
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