1,721,053 research outputs found
Design of electromagnetically compatible electronics
No full textEMC is a channel capacity problem, where with the help of adaptation the signal coding and signal processing and reduction of unintentional coupling, the chance of corruption of the transferred signal information is minimized. For the topology of an electronic circuit this implies that with the help of filtering, reduction of peak detection and reduction of quadratic detection a reversible transfer is obtained, so that the separability between signals is preserved. To prevent unintentional coupling, shared conductors and parasitic antennas have to be eliminated from a circuit layout. All potential parasitic antennas can be found systematically with the help of graph theory. Loop antennas are detected as graph circuits and dipole antennas as graph cuts. For analysis and verification of the EM compatibility of a circuit layout, a new algorithm is introduced for extraction of an equivalent circuit description. In contrast to existing algorithms, the circuit parameters are not derived from the extracted voltage-current relationship, but from the EM-power transfers between circuit components. This method is more accurate, because no quasi-static approximation of the EM fields is required, so that no accumulation of phase errors can arise. Moreover, when using voltage extraction, it is implicitly assumed that the EM-power transfer is confined between the terminals of the circuit components. This assumption is only valid for layouts that consist of transmission lines. However, circuit extraction based on the EM power transfer does not have this limitation and can be applied to any type of layout.Electrical Engineering, Mathematics and Computer Scienc
A 24GHz Radar Receiver in CMOS
No full textThis thesis investigates the system design and circuit implementation of a 24GHz-band short-range radar receiver in CMOS technology. The propagation and penetration properties of EM wave offer the possibility of non-contact based remote sensing and through-the-wall imaging of distance stationary or moving objects. The feasibility of realizing these concepts in hardware with a small form factor could accelerate commercialization and initiate new product opportunities. Minimizing the receiver power consumption to the 15mW range enables 4 hours of continuous operation from a 1.2 gram button sized lithium battery. CMOS technology has the potential for realization of both the RF transceiver and baseband processor in a single chip. An understanding of the functional requirements is a prerequisite for system optimization. The 15mW power budget necessitates the continuous nature of FMCW radar configuration, which obviates the requirement for a power-hungry transmitting amplifier. FMCW radar in short-range applications benefits from the phase noise correlation between transmitted and received waveforms, which may be exploited to lower the power consumption of the LO generation circuits. A choice for the heterodyne receiver architecture mitigates erroneous detection due to second-order intermodulation distortions caused by interfering radar transmitters nearby, accuracy degradation due to frequency pulling of the ultra-wideband VCO, and signal quality degradation due to flicker noise generated by CMOS transistors. The power dissipation and hardware overhead of a heterodyne receiver are relaxed by proper frequency planning and elimination of the image-reject filter due to frequency chirping property of the FMCW signal. A frequency downconverter for the radar receiver is realized by integrating a LNA, a Gilbert-type mixer, and a VCO running at the carrier frequency. A varactorless frequency tuning scheme is proposed for the VCO which breaks through the conventional trade-offs seen in continuous and wideband mm-wave frequency generation between capacitance tuning ratio, quality factor, and operating frequency in CMOS design. Inductive frequency tuning is enabled by a transformer resonant tank which exploits the gyration (90 degree) across the input/output terminal voltages of a transconductor. The parallel resonant frequency is controlled by sweeping the sign and magnitude of the transconductance. The VCO is frequency-agile, and is continuously tunable by altering the DC bias current of the transconductance cell. Adaptability between frequency tuning and power consumption is possible. Two VCO test circuits are reported in this thesis. (1) A proof of concept in 0.13um RF-CMOS consumes 43mW from a 1.2V supply. The frequency coverage is from 23.2GHz to 29.4GHz (23.6% tunable range) and the phase noise is -92.6dBc/Hz at 1MHz frequency offset. (2) A miniaturized prototype is implemented in 90nm CMOS for the radar receiver. It consumes 5.7mW from a 1.0V supply. Its maximum frequency range is from 18.6GHz to 21.2GHz (13.1% tunable range) and phase noise is at 1MHz frequency offset. Operation of a CMOS LNA in the moderate inversion region and at a frequency approaching the transistor's operational limit deteriorates its power gain and noise figure. A two-step LNA optimization algorithm is proposed in this thesis which addresses both the device and circuit levels. Transistor dimensions and biasing are set for optimal power gain, noise figure, linearity, bandwidth, and matching network loss. Partitioning the limited power budget across multiple gain stages maximizes the overall power gain. Optimizing the transistor's interaction with bilateral power flows in a multi-stage amplifier is facilitated by Smith chart based visualization and a computer-aided design methodology. The advantages of this methodology are demonstrated by design examples. Current-feedback by a 3-port transformer in a cascode LNA is proposed in this thesis in order to increase the power gain and lower the noise figure performance under low-power conditions. The feedback modifies the relationship between the input referred voltage and current noise sources of a common-gate MOS transistor, and thereby fulfills the internal interface impedance conditions in the cascode LNA for optimal power gain and noise figure matching. A two-stage, single-ended, current-feedback cascode LNA prototype is realized in 90nm CMOS. Physical implementation with multiple magnetic components, signal integrity associated with current return path, and circuit simulations employing an S-parameter model are addressed and emphasized in the LNA development. Consuming just 3mW from a 1V supply, the LNA achieves 14.5dB peak power gain, a -3dB gain bandwidth of 5.0GHz. The noise figure varies from 4.9dB to 5.6dB across a 22GHz and 26GHz RF bandwidth, and the IIP3 is -6.0dBm. The frequency downconverter is realized by integrating the inductive-tuned VCO and current-feedback LNA with a differential Gilbert-type mixer. Isolation of the LNA single-ended current return path from the rest of the receiver is maintained by a 8-port transformer balun preceding the mixer. This receiver RF front-end draws 10.7mW from a 1.0V supply, and delivers 12.6dB peak power gain, -3dB bandwidth of 1.25GHz. The noise figure varies from 10.6dB to 11.5dB across the RF bandwidth, and the IIP3 of the downconverter is -12.1dBm.Microelectronics & Computer EngineeringElectrical Engineering, Mathematics and Computer Scienc
Smart Systems Integration for Autonomous Wireless Communications
No full textIntegration of sensors and wireless transceivers for system networking aims at emerging applications that are highly integrated, self-powered, and low cost, relying on efficient power management schemes to prolong lifetime, thus eliminating the need for batteries as a limited primary source of energy. These applications include: health monitoring and body-area networks, environment and infrastructure monitoring, security, and building automation. Autonomous wireless transmitter sensor nodes that harvest solar energy outdoors and light energy indoors via a solar cell or photovoltaic module are developed for ultra-wideband 3-10 GHz communications. Photovoltaic (PV) antennas are used as both DC power source and radio-frequency (RF) radiator or receptor. Sharing the area consumed by the primary DC power source with the antenna reduces the size and overall cost of the transceiver, resulting in a smarter integrated wireless system. The overall package consists of a temperature sensor, a supercapacitor or a rechargeable battery, DC power management, digital signal processing, analog, RF circuitry, and a PV antenna. One transmitter node uses a single solar cell behaving as a broadband monopole antenna to generate up to 20 mW-peak power outdoors and consumes an average power of 10 µW when transmitting 1 kbps every minute. Other sensor nodes employ a PV dipole antenna for outdoor applications and a flexible PV loop antenna for in an indoor environment, transmitting data packets at 10 kbps with average power consumptions of 15 µW. These sensor nodes are light weight (< 10 g), suitable for portable and wearable applications.MicroelectronicsElectrical Engineering, Mathematics and Computer Scienc
An FM-UWB Transceiver for Autonomous Wireless Systems
No full textThis thesis discusses the design and implementation of a transmitter and a receiver for an FM-UWB scheme in CMOS. The main challenge is to reach a power efficiency of better than 10 nJ/bit at a data rate of 100 kbit/s for both the transmitter and the receiver design. This thesis also discusses the design and implementation of a power management unit for an autonomous wireless system. The challenge in this design is to obtain a high efficiency DC-DC conversion using the switched capacitor topology and low voltage ripple at the output voltage.Electronic Research LaboratoryElectrical Engineering, Mathematics and Computer Scienc
Millimeter-Wave Phased-Array Transmitter in CMOS
No full textMicroelectronicsElectrical Engineering, Mathematics and Computer Scienc
Low-voltage, low-power feedforward-compensated active mixers with improved linearity
No full textMicroelectronicsElectrical Engineering, Mathematics and Computer Scienc
Companding baseband circuits for wireless communications
No full textMicroelectronicsElectrical Engineering, Mathematics and Computer Scienc
Ultra-Low-Power Event-Driven Radio Design
No full textThe emerging field of internet of things promises mankind an enhanced life quality, produc-tivity and security. One critical technology enabler is ubiquitous and unobtrusive wireless connectivity activated by ambient events and operated with little human intervention for con-figuration and maintenance. Commercial off-the-shelf radio devices cannot achieve the desired performance, reliability and ultra-low power consumption around 100µW at the same time. In this work, research is carried out on the design and implementation of an ultra-low-power radio for generic wireless event-driven applications including healthcare, information and enter-tainment, industrial and home automation, as well as environment monitoring. To fulfill the stringent power budget, the envelope detection and the direct-modulation are the architectures of choice for receiver and transmitter front-ends, respectively. However, such radios suffer from poor sensitivity and frequency selectivity, and thus are unable to op-erate reliably across the desired link distance or in the presence of interference. This work investigated the root causes of insufficient sensitivity and selectivity in envelope detection receivers, and proposed design guidelines to optimize their performance. Furthermore, two novel envelope detection schemes have been proposed. The synchronized-switching technique improves the sensitivity by suppressing DC offset and 1/f noise in the receiver, while the 2-tone signaling technique enables in-band interference rejection which was not possible in prior arts. Prototype circuits have been built to verify the proposed techniques. On a 90nm CMOS technology, a transmitter and a receiver front-end are designed to benchmark the performance of 2-tone envelope detection in practice. The digital-IF, direct-modulation transmitter carries out the 2-tone IF-PSK modulation with -6dBm output power while consuming 893µW. The 2-tone envelope detection receiver realized up to 282 times improvement in interference re-jection while dissipating between 63.5µW and 121µW. A link budget of over 80dB is realized by this transceiver pair, which translates to a link span up to 30 meters in indoor environments and 100 meters outdoors. By following a systematic approach, devising innovative architectures, and optimizing circuit performance, this work has confirmed the feasibility of ultra-low-power, autonomous and robust event-driven radios in low-cost and commercially available CMOS technologies.Microelectronics & Computer EngineeringElectrical Engineering, Mathematics and Computer Scienc
High-Performance mm-Wave and Wideband Large-Signal Amplifiers
No full textMicroelectronicsElectrical Engineering, Mathematics and Computer Scienc
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