8,849 research outputs found

    The electrical and interface properties of metal-ferroelectric (lanthanum substituted bismuth titanate: BLT)-insulator-semiconductor (MFIS) structures with various insulators

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    We have investigated metal-ferroelectric-insulator semiconductor (MFIS) structures with lanthanum substituted bismuth titanate (BLT) as a ferroelectric layer and lanthanum oxide (LO) or zirconium silicate (ZSO) as an insulating buffer layer between BLT and Si substrate. The morphology of BLT films deposited on LO or ZSO oxide was not changed due to the good thermal stability of LO and ZSO films. But an interface reaction between BLT and buffer layer started at high annealing temperature (750 degrees C), which was confirmed by transmission electron microscopy (TEM) and energy dispersive X-ray spectroscopy (EDS). The maximum memory window was 3.59 V at a sweep voltage of 7 V with the LO film annealed at 650 degrees C and a thickness of 5 nm. With BLT/LO annealed at 750 degrees C, the window was decreased due to the reaction between the BLT film and LO. The memory window was about 1 V lower with a ZSO film because ZSO film has a lower dielectric constant than LO film. The MFIS structure annealed at 750 degrees C had a lower leakage current density because the electrical properties of the buffer layer (La oxide or Zr silicate) were improved by the thermal process.X113sciescopu

    G2 & G1 plants species of SW Colorado

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    Presented at the 16th symposium held on September 27, 2019 in Grand Junction, Colorado.2019 G2 species of SW Colorado -- 2019 G1 species of SW Colorado

    P'ing-lo

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    P'ING-LO China Proper SW (-) P'ing-lo (G 49 U) ( -

    Lo-ting

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    LO-TING China Proper SW (-) Lo-ting (Sheet F-49-J) ( -

    Lo-p'ing

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    LO-P'ING China Proper SW (-) Lo-p'ing (Sheet G-48-U) ( -

    Lo-tien

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    LO-TIEN China Proper SW (-) Lo-tien (Sheet G-48-Q) ( -

    Lo-shan (Kiating)

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    LO-SHAN (KIATING) China Proper SW (-) Lo-shan (Kiating) (Sheet H-48-N) ( -
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