104 research outputs found
Performance analysis of methods that overcome false sharing effects in software DSMs
No full textPage-based software DSMs experience high degrees of false sharingespecially in irregular applications with fine grain sharinggranularity. The overheads due to false sharing is considered to be adominant factor limiting the performance of software DSMs. Severalapproaches have been proposed in the literature to reduce/eliminatefalse sharing. In this paper, we evaluate two of these approaches,viz., the Multiple Writer approach and the emulated fine grain sharing(EmFiGS) approach. Our evaluation strategy is two pronged. First, weuse an implementation-independent analysis that uses overhead counts tocompare the different approaches. Our analysis show that the benefitsgained by eliminating false sharing are far outweighed by theperformance penalty incurred due to the reduced exploitation of spatiallocality in the EmFiGS approach. As a consequence, any implementationof the EmFiGS approach is likely to perform significantly worse thanthe Multiple Writer approach. Second, we use experimental evaluation tovalidate and complement our analysis. The experimental results matchwell with our analysis. Also the execution times of the applicationfollow the same trend as in our analysis, reinforcing our conclusions.More specifically, the performance of the EmFiGS approach issignificantly worse, by a factor of 1.5 to as much as 90 times,compared to the Multiple Writer approach. In many cases, the EmFiGSapproach performs worse than even a single writer lazy release protocolwhich experiences very high overheads due to false sharing.
The performance of the EmFiGS approach remains worse than the MultipleWriter approach even after incorporating Tapeworm-a record and replaytechnique that fetches pages ahead of demand in an aggregatedfashion-to alleviate the spatial locality effect. We next present theeffect of asynchronous message handling on the performance of differentmethods. Finally, we investigate the inter-play between spatiallocality exploitation and false sharing elimination with varyingsharing granularities in the EmFiGS approach and report the tradeoffs
Streamroller : A Unified Compilation and Synthesis System for Streaming Applications.
No full textThe growing complexity of applications has increased the need for higher processing power. In the embedded domain, the convergence of audio, video, and networking on a handheld device has prompted the need for low cost, low power,and high performance implementations of these applications in the form of custom
hardware. In a more mainstream domain like gaming consoles, the move towards more realism in physics simulations and graphics has forced the industry towards multicore systems. Many of the applications in these domains are streaming in nature. The key challenge is to get efficient implementations of custom hardware from these applications and map these applications efficiently onto multicore architectures.
This dissertation presents a unified methodology, referred to as Streamroller, that can be applied for the problem of scheduling stream programs to multicore architectures and to the problem of automatic synthesis of
custom hardware for stream applications. Firstly, a method called stream-graph modulo scheduling is presented, which maps stream programs effectively onto a multicore architecture. Many aspects of a real system, like
limited memory and explicit DMAs are modeled in the scheduler. The scheduler is evaluated for a set of stream programs on IBM's Cell processor.
Secondly, an automated high-level synthesis system for creating custom hardware for stream applications is presented. The template for the custom hardware is a pipeline of accelerators. The synthesis involves designing loop accelerators for individual kernels, instantiating buffers to store data passed between kernels, and linking these building blocks to form a pipeline. A unique aspect of this system is the use of multifunction accelerators, which improves cost by
efficiently sharing hardware between multiple kernels.
Finally, a method to improve the integer linear program formulations used in the schedulers that exploits symmetry in the solution space is
presented. Symmetry-breaking constraints are added to the formulation, and the performance of the solver is evaluated.PhDComputer Science & EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttp://deepblue.lib.umich.edu/bitstream/2027.42/61662/1/kvman_1.pd
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Continuous discovery and goal-oriented control of smart devices in mobile environments
No full textThe "disappearing computer" describes a computing paradigm where ubiquitous "smart" devices embedded in everyday environments can seamlessly adapt to the unconstrained goals of users. In this paradigm, a user should be able to move between different spaces with the expectation that the devices embedded in each space will proactively adapt to the user’s needs with limited intervention—e.g., to automatically adjust a home's lighting and temperature to help a user relax, or to configure a conference room in preparation for a user's presentation. This dissertation frames an underlying technical challenge of the disappearing computer as one of providing continuous discovery and goal-oriented control of smart devices in the presence of user mobility. To that end, I introduce three key contributions.
First, as users are mobile, applications require continuous awareness of the nearby devices that can be leveraged to support user goals. I thus introduce a novel protocol for continuous adaptive neighbor discovery, allowing mobile applications to continuously discover smart devices with more reliable latency and energy consumption than existing protocols. Second, upon discovering nearby devices, applications require an ability to flexibly map loosely-specified user goals (e.g., "I want to relax") to concrete plans of action that leverage the devices available (e.g., "adjust the lights and play relaxing music"). I introduce large language models (LLMs) to this problem, starting with a user survey to identify LLMs' failure modes and performance indicators, and culminating in a real-world implementation and user experience study of a smart space controlled by LLMs. Finally, moving goal-oriented discovery and control away from the cloud and on to devices themselves is essential to protect user privacy, reduce business cost, and ensure the longevity of consumer applications. My third contribution thus introduces thoughtful things: individual devices with an embedded capacity for self-knowledge that enables them to reason about their internal states in response to user goals, without a dependency on the cloud. Taken in concert, these three contributions are the foundation for building a transformative mobile application that can proactively and intuitively adapt smart environments to the loosely-constrained goals of their users.Electrical and Computer Engineerin
A conceptual framework for the assessment of integrated energy storage resources
No full textConcerns regarding climate change impacts, energy security and sustainability are key drivers of the growing deployment of renewable energy resources. The variability, uncertainty and intermittency associated with the integration of these resources make the operation of the conventional power grid particularly challenging. Energy storage resources (ESRs) are one of the most promising solutions to address these challenges. The unique and versatile nature of storage finds its use in applications over a broad time spectrum. Furthermore, fast acting storage helps smoothen out the variable renewable output, minimize spillage of clean energy and manage the steep ramps associated with renewable energy integration. Storage also finds its use across all three domains of the electrical network, i.e., generation, transmission and distribution.
Cost reductions, technological innovations and regulatory initiatives have invigorated the interest in storage. However, the rapid growth of the storage sector is met by daunting challenges to the implementation of storage in the grid, especially since storage is very different from the conventional grid assets. The nature of storage is unique and its implementation has to be treated as such to fully harness the value it brings to the system it is integrated into. To this end, we outline a framework in this thesis for the integration of energy storage resources into the grid. The framework provides a systematic construct to study the various aspects of ESR integration in a system. The framework is comprehensive as it reflects the physical, information, environmental and financial aspects of storage operations. The thrust of the framework is its flexibility to accommodate the wide range of applications that storage provides on different time-scales. Furthermore, the framework explicitly captures the nature of deployment of storage for a particular application and shows the necessary interactions between ESR and the various players that interact with the ESR.
Case studies to illustrate the implementation of the information, environmental and financial layers of the framework are also presented in the thesis. The studies and their results establish that the framework is an extremely useful construct for the development of tools and models to aid in planning and operational studies and the formulation of policy and incentives and as such, is helpful in bringing the vision of energy storage closer to reality.Submission published under a 24 month embargo labeled 'U of I Access', the embargo will last until 2018-05-01The student, Archana Manjunath, accepted the attached license on 2016-04-09 at 13:31.The student, Archana Manjunath, submitted this Thesis for approval on 2016-04-09 at 13:43.This Thesis was approved for publication on 2016-04-13 at 11:07.DSpace SAF Submission Ingestion Package generated from Vireo submission #9172 on 2016-07-07 at 13:49:01Made available in DSpace on 2016-07-07T20:27:12Z (GMT). No. of bitstreams: 2
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Previous issue date: 2016-04-13Embargo set by: Seth Robbins for item 93095
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Streamroller: Automatic Synthesis of Prescribed Throughput Accelerator Pipelines
No full textIn this paper, we present a methodology for designing a pipeline of accelerators for an application. The application is modeled using sequential C language with simple stylizations. The synthesis of the accelerator pipeline involves designing loop accelerators for individual kernels, instantiating buffers for arrays used in the application, and hooking up these building blocks to form a pipeline. A compiler-based system automatically synthesizes loop accelerators for individual kernels at varying performance levels. An integer linear program formulation which simultaneously optimizes the cost of loop accelerators and the cost of memory buffers is proposed to compose the loop accelerators to form an accelerator pipeline for the whole application. Cases studies for some applications, including FMRadio and Beamformer, are presented to illustrate our design methodology. Experiments show significant cost savings are achieved through hardware sharing, while achieving the prescribed throughput requirements
Strategy and Steps for Analytical Method Validation
No full textThis Dissertation / Report is the outcome of investigation carried out by the creator(s) / author(s) at the department/division of Central Food Technological Research Institute (CFTRI), Mysore mentioned below in this page
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