1,720,971 research outputs found
Stresses in electroless Ni-P films for electronic packaging applications
Electroless-plated nickel films for electronic packaging applications such as under bump metallurgy (UBM) and flip chip bumps are investigated in this study. Quantitative stress of an electroless-plated Ni-P film on an AI coated Si wafer has been measured using a laser scanning profiler and the Stoney equation. A tensile intrinsic stress was developed due to plating defects, and also a tensile extrinsic thermo-mechanicaI stress due to temperature change and the CTE mismatch of Ni film and Si substrate was observed. It was found that the extrinsic stress became more tensile as the phosphorus content of the eIectroless Ni film decreased. Therefore, it is necessary to reduce the amount of stresses developed at the electroless Ni film by controlling phosphorous content of the electroless Ni film for reliable electronic packaging applications.This
work was supported by the Center for Electronic Packaging Materials, Korea
Science and Engineering Foundatio
Reduced thermal strain in flip chip assembly on organic substrate using low cte anisotropie conductive film
Flip chip assembly directly on organic boards offers miniaturization of package size as well as reduction in interconnection distances, resulting in a high performance and cost-competitive packaging method, This paper describes the usefulness of low cost flip-chip assembly using electroless Ni/Au bump and anisotropic conductive films on organic boards such as FR-4, As bumps for flip chip, electroless Ni/Au plating was performed as a low cost bumping method. Effect of annealing on Ni bump characteristics informed that the formation of crystalline nickel with Ni3P precipitation above 300 degrees C causes an increase of hardness and an increase of the intrinsic stress. As interconnection material, modified ACFs composed of nickel conductive fillers for conductive fillers, and nonconductive fillers for modification of him properties, such as coefficient of thermal expansion (CTE), were formulated for improved electrical and mechanical properties of ACF interconnection. Three ACF materials with different CTE values were prepared and bonded between Si chips and FR-4 boards for the thermal strain measurement using moire interferometry, The thermal strain of the ACF interconnection layer, induced by temperature excursion of 80 degrees C, was decreased according to the decreasing CTEs of ACF materials. This result indicates that the thermal fatigue life of ACF flip chip assembly on organic boards, limited by the thermal expansion mismatch between the chip and the board, could be increased by low CTE ACF.This work
was supported by KOSEF and Electronic Packaging Research Center in KAIST
Interfacial reactions and bump reliability of various Pb-free solder bumps on electroless Ni-P UBMs
This work was supported by the Center for Electronic
Packaging Materials of Korea Science and Engineering
Foundation
Flip chip assembly on organic boards using anisotropic conductive adhesives (ACAs) and nickel/gold bumps
Flip chip assembly on organic boards using anisotropic conductive adhesives/films and nickel/gold bump
Applications of Ni and Cu electroless plating techniques for flip chip bumping and under bump metallurgy (UBM)
Solder reflow process induced residual warpage measurement and its influence on reliability of flip-chip electronic packages
To meet the future needs of high pin count and high performance, package size of flip-chip devices is constrained to become larger. In addition, to fulfill the environment issues, lead free solders will be replacing lead contained eutectic (Sn/37Pb) in near future. Thus, in this work, the effect of residual warpage and consequent residual stress on the reliability of large flip-chip using lead free solder is examined. Several effective experimental approaches to accurately measure residual warpage, using Moire interferometry, shadow Moire, and image processing schemes, are introduced. Moreover, geometric, process, and material parameters affecting the residual warpage during reflow process are discussed and some modifications are suggested. Finally, it is verified that it is crucial to accurately quantify and control the residual warpage in order to guarantee the overall reliability of flip-chip packages regardless of presence of underfill. (c) 2005 Elsevier Ltd. All rights reserved.Department of Mechanical Engineering, Korea Advanced Institute of Science and Technology, 373-1 Guseong-dong, Yuseong-gu, Daejeon 305-701, South Korea
b Department of Material Science, Korea Advanced Institute of Science and Technology, 373-1 Guseong-dong, Yuseong-gu, Daejeon 305-701, South Kore
Effects of Cu contents in Pb-free solder alloys on interfacial reactions and bump reliability of Pb-free solder bumps on electroless Ni-P under-bump metallurgy
Using the screen-printed solder-bumping technique on the electroless plated Ni-P under-bump metallurgy (UBM) is potentially a good method because of cost effectiveness. As SnAgCu Pb-free solders become popular, demands for understanding of interfacial reactions between electroless Ni-P UBMs and Cu-containing Pb-free solder bumps are increasing. It was found that typical Ni-Sn reactions between the electroless Ni-P UBM and Sn-based solders were substantially changed by adding small amounts of Cu in Sn-based Pb-free solder alloys. In Cu-containing solder bumps, the (Cu,Ni)(6)Sn(5) phase formed during initial reflow, followed by (Ni,Cu)(3)Sn(4) phase formation during further reflow and aging. The Sn3.5Ag solder bumps showed a much faster electroless Ni-P UBM consumption rate than Cu-containing solder bumps: Sn4.0Ag0.5Cu and Sn0.7Cu. The initial formation of the (Cu,Ni)(6)Sn(5) phase in SnAgCu and SnCu solders significantly reduced the consumption of the Ni-P UBM. The more Cu-containing solder showed slower consumption rate of the Ni-P UBM than the less Cu-containing solder below 300degreesC heat treatments. The growth rate of the (Cu,Ni)(6)Sn(5) intermetallic compound (IMC) should be determined by substitution of Ni atoms into the Cu sublattice in the solid (Cu,Ni)(6)Sn(5) IMC. The Cu contents in solder alloys only affected the total amount of the (Cu,Ni)(6)Sn(5) IMC. More Cu-containing solders were recommended to reduce consumption of the Ni-based UBM. In addition, bump shear strength and failure analysis were performed using bump shear test.This work was supported by the Center for
Electronic Packaging Materials, Korea Science and
Engineering Foundation
Comparison of interfacial reactions and reliabilities of Sn3.5Ag, Sn4.0Ag0.5Cu, and Sn0.7Cu solder bumps on electroless Ni-P UBMs
This work was supported by Center for Electronic
Packaging Materials of Korea Science and Engineering
Foundation
Studies on the interfacial reactions between electroless Ni UBM and 95.5Sn-4.0 Ag-0.5 Cu alloy
"This work was supported by Center for Electronic
Packaging Materials of Korea Science and Engineering
Foundation.
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