210 research outputs found
A low-voltage low-power instrumentation amplifier based on supply current sensing technique
No full textMinaei, Shahram (Dogus Author)In this paper a new low-voltage low-power instrumentation amplifier (IA) is presented. The proposed IA is based on supply current sensing technique where Op-Amps in traditional IA based on this technique are replaced with voltage buffers (VBs). This modification results in a very simplified circuit, robust performance against mismatches and high frequency performance. To reduce the required supply voltage, a low-voltage resistor-based current mirror is used to transfer the input current to the load. The input and output signals are of voltage kind and the proposed IA shows ideal infinite input impedance and a very low output one. PSPICE simulation results, using 0.18 μm TSMC CMOS technology and supply voltage of ±0.9 V, show a 71 dB CMRR and a 85 MHz constant −3 dB bandwidth for differential-mode gain (ranging from 0 dB to 18 dB). The output impedance of the proposed circuit is 1.7 Ω and its power consumption is 770 µW. The method introduced in this paper can also be applied to traditional circuits based on Op-Amp supply current sensing technique
Enhanced FAST TCP by solving rerouting problem
No full textDelay-based congestion control algorithms inability to recognize increased RTT related to rerouting from increased RTT related to congestion is their most serious problem which has serious effect on their throughput. FAST TCP is one of delay-based TCP variants that although outperforms other TCP variants in high bandwidth-delay product networks, but suffers from several problems that inhere in its procedure to estimate trip delay. The most serious of these problems is rerouting. When rerouting occurs and round-trip time (RTT) of the new path is longer than RTT of the old path, the throughput of FAST TCP decreases sharply. Because FAST misinterprets the increased RTT as result of the network congestion and consequently decreases its own window size. This paper solves this problem by considering the relationship between sending rate and observed RTT. The simulation results show the effectiveness of proposed solution to solve rerouting problem while simultaneously preserves FAST TCP prominent primitive features
Dual input all-pass filter using DVCC
No full textMinaei, Shahram (Dogus Author) -- Conference full title: International Symposium on Signals, Circuits and Systems, SCS 2003; Iasi; Romania; 10 July 2003 through 11 July 2003.A new first-order dual-input all-pass filter in current-mode operation using the differential voltage current conveyor (DVCC) is proposed. The novelty of the configuration is that the DVCC supplies high input impedances for applications requesting differential or floating inputs. PSPICE simulation results verifying theoretical analyses are also included
General configuration for realizing current-mode first-order all-pass filter using DVCC
No full textMinaei, Shahram (Dogus Author)In this paper, a new general configuration for realizing current-mode all-pass filter circuits using differential voltage current conveyor (DVCC) is proposed. The proposed configuration is composed of a DVCC and five passive admittances. However, each of the circuits extracted from the proposed configuration uses only three passive elements. As an application, the proposed configuration is used to construct a quadrature oscillator. The theoretical results are verified by SPICE simulations
Universal current-mode filters and parasitic impedance effects on the filter performances
No full textMinaei, Shahram (Dogus Author)In this letter, two universal current-mode (CM) filters for simultaneously realizing low-pass, band-pass and high-pass characteristics are proposed. Both of the presented filters can also realize notch and all-pass responses with interconnection of the relevant output currents. They employ second-generation current-controlled conveyors (CCCIIs) and only grounded capacitors. They also have low active and passive element sensitivities along with electronically adjustable angular resonance frequency (omega(0)) and quality factor (Q). Based on the first developed filter, the parasitic impedance effects of the conveyors on the filter performances are investigated in detail. Simulation results using SPICE simulation program are included to verify the theory
ASD: çok amaçlı ayarlanabilir sınıflandırıcı devreler
No full textGöknar, İzzet Cem (Dogus Author) -- Minaei, Shahram (Dogus Author) -- Yıldız, Merih (Dogus Author)Çalışmada, ayarlanabilir sınıflandırıcı devreleri ve uygulama alanları incelenmiştir. AMS 0.35 μm CMOS prosesi ile, tasarlanan sınıflandırıcı bir tümdevrenin üretimi de yapılmıştır. Bu sınıflandırıcı devresinin kontrol parametrelerinin bulunmasını sağlayan öğrenme algoritmaları çeşitli uygulamalar için geliştirilmiştir. Sınıflandırma işlemleri geliştirilen algoritmalar ve üretilen devre ile İris ve Haberman veri kümelerine uygulanarak sonuçların uyum içinde olduğu gösterilmiştir.TÜBİTA
Pulse width modulation using a recently developed CMOS core circuit
No full textGöknar, İzzet Cem (Dogus Author) -- Minaei, Shahram (Dogus Author) -- Yıldız, Merih (Dogus Author) -- Akçakaya, Ergül (Dogus Author)In this paper a new approach for a Pulse Width Modulation (PWM) circuit operating in current-mode using a CMOS classifier core circuit, and its application to level crossing are presented. The proposed architecture is much simpler than existing PWM methods and the generated PWM signal can be controlled electronically through the control currents of a core circuit. Measurements performed with DU-TCC 1209, an IC designed and manufactured using 0.35 μm AMS technology parameters, show a perfect match with theoretical results
Realization of arbitrary current transfer functions based on commercially available CCII + s
No full textMinaei, Shahram (Dogus Author)In this paper, a new topology for realizing arbitrary nth-order current transfer function (TF), consisting of only plus-type second-generation current conveyors (CCII+s), is suggested. The proposed TF simulator employs only grounded capacitors and is free from the passive element matching requirements. The developed TF simulator can be constructed directly with commercially available active components such as AD844s. It has low-input and high-output impedances, a feature which makes it fully cascadable with other current-mode topologies. Moreover, the proposed simulator can provide gain at its outputs. Simulation and experimental test results for various filter examples are included to confirm the claimed theory
A high-performance full-wave rectifier using a single CCII-, two diodes, and two resistors
Get PDFMinaei, Shahram (Dogus Author) -- Yıldız, Merih (Dogus Author)In this paper, a voltage-mode full-wave rectifier circuit is proposed. The proposed full-wave rectifier circuit consists of only a single negative-type second-generation current conveyor, two diodes, and two matched resistors. The proposed circuit, without requiring any external bias voltages and currents, has a simple structure using a minimum number of active and passive components. It is implemented with AMS 0.35 mu m technology operating with +/- 1.65 V. Computer simulation and experimental results are included to verify the theory. (c) 2017 Sharif University of Technology. All rights reserved
Linearly weighted classifier circuit
No full textYıldız, Merih (Dogus Author), Minaei, Shahram (Dogus Author) -- Full conference title: 2009 Joint IEEE North-East Workshop on Circuits and Systems and TAISA Conference : (NEWCAS-TAISA 2009) ; Toulouse, France, 28 June - 1 July 2009In this paper a CMOS realization of a linearly weighted classifier circuit which is called classifier block is proposed. The proposed classifier block is composed of linearly weighted circuits (LWC) and CMOS core circuits (CC). The proposed circuit can classify linearly non-separable data. The weights of the classifier circuit are achieved with LWC blocks. Using 0.35 mum AMS technology parameters, SPICE simulation results for a LWC and classifier block are included to verify the expected results
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