13,471 research outputs found

    DBLP-derived labeled data for author name disambiguation

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    This is a DBLP-derived labeled data originally created by Dr. C. Lee Giles at Penn State University and filtered for duplicate removal and error correction by Dr. Jinseok Kim at University of Michigan. For more details, see references below.1. Kim, Jinseok (2018). Evaluating author name disambiguation for digital libraries: a case of DBLP. Scientometrics. doi:10.1007/s11192-018-2824-5 2. Kim, Jinseok & Kim, Jenna (2018). The impact of imbalanced training data on machine learning for author name disambiguation. Scientometrics. doi: 10.1007/s11192-018-2865-9Each row refers to an author name instance with following feature information separated by tab.author name: full name string extracted from DBLPunique author id: labels assigned manually by Dr. C. Lee Giles's teampaper id: assigned by Dr. Jinseok Kimauthor list: names of authors in the byline of the paperyear: publication yearvenue: conference or journal namestitle: stopwords removed and stemmed by the Porter's stemmerIf you want to use this dataset, please consider to cite papers below.For the original dataset: Han, H., Giles, L., Zha, H., Li, C., & Tsioutsiouliklis, K. (2004). Two Supervised Learning Approaches for Name Disambiguation in Author Citations. JCDL 2004: Proceedings of the Fourth ACM/IEEE Joint Conference on Digital Libraries, 296-305. doi:10.1145/996350.996419For the filtered dataset: 1. Kim, Jinseok (2018). Evaluating author name disambiguation for digital libraries: a case of DBLP. Scientometrics. doi:10.1007/s11192-018-2824-5 or2. Kim, Jinseok & Kim, Jenna (2018). The impact of imbalanced training data on machine learning for author name disambiguation. Scientometrics. doi: 10.1007/s11192-018-2865-9</div

    Arbitrary-Scale Image Generation and Upsampling Using Latent Diffusion Model and Implicit Neural Decoder

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    Super-resolution (SR) and image generation are important tasks in computer vision and are widely adopted in real-world applications. Most existing methods, however, generate images only at fixed-scale magnification and suffer from over-smoothing and artifacts. Additionally, they do not offer enough diversity of output images nor image consistency at different scales. Most relevant work applied Implicit Neural Representation (INR) to the denoising diffusion model to obtain continuous-resolution yet diverse and high-quality SR results. Since this model operates in the image space, the larger the resolution of image is produced, the more memory and inference time is required, and it also does not maintain scale-specific consistency. We propose a novel pipeline that can super-resolve an input image or generate from a random noise a novel image at arbitrary scales. The method consists of a pre-trained auto-encoder, a latent diffusion model, and an implicit neural decoder, and their learning strategies. The proposed method adopts diffusion processes in a latent space, thus efficient, yet aligned with output image space decoded by MLPs at arbitrary scales. More specifically, our arbitrary-scale decoder is designed by the symmetric decoder w/o up-scaling from the pre-trained auto-encoder, and Local Implicit Image Function (LIIF) in series. The latent diffusion process is learnt by the denoising and the alignment losses jointly. Errors in output images are backpropagated via the fixed decoder, improving the quality of output images. In the extensive experiments using multiple public benchmarks on the two tasks i.e. image super-resolution and novel image generation at arbitrary scales, the proposed method outperforms relevant methods in metrics of image quality, diversity and scale consistency. It is significantly better than the relevant prior-art in the inference speed and memory usage

    The impact of author name disambiguation on knowledge discovery from large-scale scholarly data

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    In this study, I demonstrate that the choice of disambiguation methods for resolving author name ambiguity can adversely affect our understanding of scholarly collaboration patterns and coauthorship network structures extracted from large-scale scholarly data. By utilizing large-scale bibliometric data, scholars in many fields have gleaned knowledge for use in scholarly evaluation, collaborator recommendations, research policy evaluation, and network-evolution modeling. A common challenge has been that author names in bibliometric data are not properly disambiguated: authors may share the same name (i.e., different authors are sometimes misrepresented to be a single author which can lead to a “merging of identities”). In addition, one author may use name variations (i.e., an author may be represented as two or more different authors which can lead to a “splitting of identities”). When faced with these challenges, most scholars have pre-processed bibliometric data using simple heuristics (e.g., if two author names share the same surname and given name initials, they are presumed to represent the same author identity) and assumed that their findings are robust to errors due to author name ambiguity. I test this long-held assumption in bibliometrics by measuring the impact of author name ambiguity on network properties. I accomplish this under varying conditions, including network size and cumulative time window (from 1991 to 2009) using four large-scale bibliometric datasets that cover: biomedicine, computer science, psychology and neuroscience, and one nation’s entire domestic publication output. For this task, I collate the statistical properties of coauthorship networks constructed from algorithmically disambiguated data (i.e., close to clean data) against those that come from the same networks, but are compromised by misidentified authors via first-initial and all-initials disambiguation methods. In addition, I simulate the levels of merging and splitting incrementally using those empirical datasets. My findings show that initial-based name disambiguation methods can severely distort our understanding of given networks and such distortion gets worse over time. Moreover, the distortion sometimes leads to biased or false knowledge of coauthorship network formation and evolution mechanisms such as preferential attachment generating the power-law distribution of vertex degree and to false validation of theories about the choice of collaborators in scientific research. This may result in ill-informed decisions about research policy and resource allocation. Besides measuring the impact of name ambiguity on network properties, I also test how name ambiguity can be estimated using simple heuristics such as dataset size and how merged author identities can be detected via an author’s ego-network properties to provide a practical guidance for corrective measures. My research calls for further studying the effects of author name ambiguity on coauthorship network properties and is expected to help scholars establish better practices for knowledge discovery from large-scale scholarly data.Submission published under a 24 month embargo labeled 'Closed Access', the embargo will last until 2019-08-01The student, Jinseok Kim, accepted the attached license on 2017-07-10 at 17:48.The student, Jinseok Kim, submitted this Dissertation for approval on 2017-07-10 at 17:53.This Dissertation was approved for publication on 2017-07-11 at 10:39.DSpace SAF Submission Ingestion Package generated from Vireo submission #11383 on 2017-09-29 at 11:18:25Made available in DSpace on 2017-09-29T16:39:41Z (GMT). No. of bitstreams: 10 KIM-DISSERTATION-2017.pdf: 4803686 bytes, checksum: 9a250e9bbc6a040f1899993b4dce074d (MD5) Kim_RightsLinkLicense_Elsevier.pdf: 200417 bytes, checksum: 220dca391574511bba845a0c66202eb2 (MD5) Kim_RightsLinkLicense_IEEE.pdf: 289775 bytes, checksum: 48e8205d14a88131fe01c57fb6f4c414 (MD5) Kim_RightsLinkLicense_JohnWileyAndSons.pdf: 193813 bytes, checksum: 2739a9d492a891f9af53e2ccbd76c0ff (MD5) Kim_RightsLinkLicense_Scientometrics1.pdf: 172966 bytes, checksum: 5d01ef49d58a2570c4b9fddfb66d8fd1 (MD5) Kim_RightsLinkLicense_Scientometrics2.pdf: 172805 bytes, checksum: 2222bc70e2d6e075da477d069fda665d (MD5) Kim_RightsLinkLicense_Scientometrics3.pdf: 172205 bytes, checksum: a54b0055f5adf0326e17011d0fd2d210 (MD5) Kim_RightsLinkLicense_SocialNetworkAnalysisAndMining.pdf: 172945 bytes, checksum: 5fa86fc4a5f5fdc5e65b4468d457d4bb (MD5) LICENSE.txt: 4208 bytes, checksum: d49af4a2747f66ba141b7b7cd389259c (MD5) PROQUEST_LICENSE.txt: 4554 bytes, checksum: 8323f4945bde1350727633d2028b8509 (MD5) Previous issue date: 2017-07-11Embargo set by: Colleen Fallaw for item 103416 Lift date: 2019-09-29T16:39:52Z Reason: Author requested closed access (OA after 2yrs) in Vireo ETD systemEmbargo set by: Colleen Fallaw for item 103416 Lift date: 2019-09-29T17:52:45Z Reason: Author requested closed access (OA after 2yrs) in Vireo ETD systemLimited Restriction Lifted for Item 103416 on 2019-09-30T09:15:32Z

    Deep Neural Network Optimized to Resistive Memory with Nonlinear Current-Voltage Characteristics

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    Artificial Neural Network computation relies on intensive vector-matrixmultiplications. Recently, the emerging nonvolatile memory (NVM) crossbar array showed a feasibility of implementing such operations with high energy efficiency. Thus, there have been many works on efficiently utilizing emerging NVM crossbar arrays as analog vector-matrix multipliers. However, nonlinear I-V characteristics of NVM restrain critical design parameters, such as the read voltage and weight range, resulting in substantial accuracy loss. In this article, instead of optimizing hardware parameters to a given neural network, we propose a methodology of reconstructing the neural network itself to be optimized to resistive memory crossbar arrays. To verify the validity of the proposed method, we simulated various neural networks with MNIST and CIFAR-10 dataset using two different Resistive Random Access Memory models. Simulation results show that our proposed neural network produces inference accuracies significantly higher than conventional neural network when the network is mapped to synapse devices with nonlinear I-V characteristics.110sciescopu

    Input Voltage Mapping Optimized for Resistive Memory-Based Deep Neural Network Hardware

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    Artificial neural network (ANN) computations based on graphics processing units (GPUs) consume high power. Resistive random-access memory (RRAM) has been gaining attention as a promising technology for implementing power-efficient ANNs, replacing GPU. However, nonlinear I-V characteristics of RRAM devices have been limiting its use for ANN implementation. In this letter, we propose a method and a circuit to address issues due to the nonlinear I-V characteristics. We demonstrate the feasibility of the method by simulating its application to multiple neural networks, from multi-layer perceptron to deep convolutional neural network based on a typical RRAM model. Results from classifying datasets including ImageNet show that the proposed method produces much higher accuracy than the naive linear mapping for a wide range of nonlinearity.116sciescopu

    Efficient Synapse Memory Structure for Reconfigurable Digital Neuromorphic Hardware

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    Spiking Neural Networks (SNNs) have high potential to process information efficiently with binary spikes and time delay information. Recently, dedicated SNN hardware accelerators with on-chip synapse memory array are gaining interest in overcoming the limitations of running software-based SNN in conventional Von Neumann machines. In this paper, we proposed an efficient synapse memory structure to reduce the amount of hardware resource usage while maintaining performance and network size. In the proposed design, synapse memory size can be reduced by applying presynaptic weight scaling. In addition, axonal/neuronal offsets are applied to implement multiple layers on a single memory array. Finally, a transposable memory addressing scheme is presented for faster operation of spike-timing-dependent plasticity (STDP) learning. We implemented a SNN ASIC chip based on the proposed scheme with 65 nm CMOS technology. Chip measurement results showed that the proposed design provided up to 200X speedup over CPU while consuming 53 mW at 100 MHz with the energy efficiency of 15.2 pJ/SOP.110Ysciescopu

    Artificial Noise-Aided Max-Min Fairness Secrecy Precoding With Partial Wiretap Channel Knowledge

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    We propose an artificial noise (AN)-aided max-min fairness (MMF) secure precoding algorithm. The algorithm jointly optimizes precoders and AN covariance matrix without alternation for a multiuser multiple-input multiple-output system with multiple colluding eavesdroppers. The formulated AN-aided MMF problem involves several challenges such as non-convexity, non-smoothness, coupled optimization variables, and partial wiretap channel state information at a transmitter (CSIT). To address the challenges, we first consider the perfect wiretap CSIT and approximate the reformulated problem as a smooth problem. Then, we derive the first-order optimality condition and interpret it as a nonlinear eigenvalue problem. Finally, we adopt a power iteration method to solve the condition. To extend the algorithm to the partial wiretap CSIT scenario, we reformulate the problem with an average wiretap rate by deriving an approximate lower bound of the rate. This enables us to exploit the partial channel knowledge. Subsequently, we propose the algorithm for the partial wiretap CSIT. Simulations validate the proposed methods.

    Implantable Neural-Recording Modules for Monitoring Electrical Neural Activity in the Central and Peripheral Nervous Systems

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    Low-power high-fidelity implantable neural-recording modules are presented to monitor electrical neural signals in the central and peripheral nervous systems. For clear measurement of neural spikes, the implemented modules employ double high-pass filters that effectively suppress low-frequency artifacts. Here, we present two different implantable recording modules: one produces analog output, and the other does digital output. The analog-output and digital-output modules are implemented to have 12 channels and 32 channels, respectively. Each implantable module is connected to an external module through a flexible printed-circuit cable. The 32-channel digital-output module has a size of 26 mm × 22 mm while consuming 97 μW of power. For the 12-channel analog-output module, the size is 25 mm × 17 mm, and the power of 57 μW is consumed. The implantable modules are designed to have a low-pass cutoff frequency of 10 kHz. The high-pass cutoff frequency can be controlled from sub-1 Hz to 500 Hz. The implemented implantable modules are successfully applied to in vivo experiments for neural recording in the central and peripheral nervous systems of a rat model

    Max-Min Fairness Beamforming With Rate-Splitting Multiple Access: Optimization Without a Toolbox

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    We propose a max-min fairness (MMF) design method in a multi-antenna downlink network, where rate-splitting multiple access (RSMA) is adopted. A main aim in the considered MMF problem is providing uniformly good rates to users, by carefully controlling the rate of each private and common message, respectively. Solving this problem is challenging since multiple optimization variables, i.e., beamforming vectors and common message portions, are intricately intertwined in a non-tractable objective function. To resolve these obstacles, we first split a whole problem into two stages. In the first stage, we identify beamforming vectors given common message portion by exploiting the LogSumExp (LSE) approximation technique and the novel generalized power iteration (GPI) framework. In the second stage, we determine common message portions under fixed beamforming vectors. Iterating these two stages, we jointly design beamforming vectors and common message portion accordingly. Via simulations, we demonstrate that our method outperforms existing other frameworks in terms of the minimum rate, while requiring extremely small computational complexity
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