102,387 research outputs found
Proceedings of the 7th IFAC Symposium on Intelligent Autonomous Vehicles (2010) - G. Indiveri and A. Pascoal Editors
No full textThe IFAC IAV Symposium is the leading IFAC event related with Intelligent Autonomous Vehicles since 1993. The symposium is held every three years and is sponsored by the IFAC Technical Committee 7.5 IAV. The 7th edition (2010) was organized by the Dipartimento Ingegneria Innovazione of the University of Salento (Italy) and was held in Lecce, Italy on September 6th, 7th and 8th, 2010. Past editions were organized in 1993 (Southampton, UK), 1995 (Espoo, Finland), 1998 (Madrid, Spain), 2001 (Sapporo, Japan), 2004 (Lisbon, Portugal) and 2007 (Toulouse, France).
The 7th IAV Symposium addressed generic methodologies and techniques applicable to intelligent autonomous vehicles including mobile robots on land, at sea, in air or in space, multi vehicle systems and networks of autonomous vehicles. The Symposium topics included a broad spectrum of issues as sensing, sensor integration and perception, architectures, planning, mission and motion control, navigation and cooperative navigation techniques, SLAM, teleoperation, human and vehicle interaction and practical applications. Due to its interdisciplinary nature, the Symposium departs from other events that focus on specific kinds of vehicles hence fostering the cross-fertilization of ideas among different application areas.
Out of 150 submitted manuscripts from 31 countries, 105 papers were accepted and presented during the Symposium. The ten most common keywords were: Vehicles, Intelligent Control, Estimation Algorithms and Theory, Navigation Systems, Sensor Fusion and Systems, Path Planning, Marine Systems, Robot Navigation Programming and Vision, Autonomous Vehicles, and Autonomous Mobile Robots. A Plenary Session took place each morning hosting keynote speakers from the areas of land, airspace and marine systems. In particular the following Plenary Talks were delivered:
* Prof. Alberto Broggi, University of Parma, Italy, "Steps Towards Full Automation of Road Vehicles" on September 6th, 2010. • Dr. Andrzey Banaszuk, United Technologies Research Center (UTRC), East Hartford, Connecticut, USA, "Model-Based Design of Robust Autonomous Aerospace Systems" on September 7th, 2010.
* Dr. Dana Yoerger, Woods Hole Oceanographic Institution, Woods Hole, USA, "Exploring the Deep Sea with Robots" on September 8th, 2010.
Giovanni Indiveri and António M. Pascoal IFAC IAV 2010 IPC co-chair
Proceedings of the 7th IFAC Symposium on Intelligent Autonomous Vehicles (2010) - G. Indiveri and A. Pascoal Editors
No full textThe IFAC IAV Symposium is the leading IFAC event related with Intelligent Autonomous Vehicles since 1993. The symposium is held every three years and is sponsored by the IFAC Technical Committee 7.5 IAV. The 7th edition (2010) was organized by the Dipartimento Ingegneria Innovazione of the University of Salento (Italy) and was held in Lecce, Italy on September 6th, 7th and 8th, 2010. Past editions were organized in 1993 (Southampton, UK), 1995 (Espoo, Finland), 1998 (Madrid, Spain), 2001 (Sapporo, Japan), 2004 (Lisbon, Portugal) and 2007 (Toulouse, France).
The 7th IAV Symposium addressed generic methodologies and techniques applicable to intelligent autonomous vehicles including mobile robots on land, at sea, in air or in space, multi vehicle systems and networks of autonomous vehicles. The Symposium topics included a broad spectrum of issues as sensing, sensor integration and perception, architectures, planning, mission and motion control, navigation and cooperative navigation techniques, SLAM, teleoperation, human and vehicle interaction and practical applications. Due to its interdisciplinary nature, the Symposium departs from other events that focus on specific kinds of vehicles hence fostering the cross-fertilization of ideas among different application areas.
Out of 150 submitted manuscripts from 31 countries, 105 papers were accepted and presented during the Symposium. The ten most common keywords were: Vehicles, Intelligent Control, Estimation Algorithms and Theory, Navigation Systems, Sensor Fusion and Systems, Path Planning, Marine Systems, Robot Navigation Programming and Vision, Autonomous Vehicles, and Autonomous Mobile Robots. A Plenary Session took place each morning hosting keynote speakers from the areas of land, airspace and marine systems. In particular the following Plenary Talks were delivered:
* Prof. Alberto Broggi, University of Parma, Italy, "Steps Towards Full Automation of Road Vehicles" on September 6th, 2010. • Dr. Andrzey Banaszuk, United Technologies Research Center (UTRC), East Hartford, Connecticut, USA, "Model-Based Design of Robust Autonomous Aerospace Systems" on September 7th, 2010.
* Dr. Dana Yoerger, Woods Hole Oceanographic Institution, Woods Hole, USA, "Exploring the Deep Sea with Robots" on September 8th, 2010.
Giovanni Indiveri and António M. Pascoal IFAC IAV 2010 IPC co-chair
An event-based VLSI network of integrate-and-fire neurons
Full text linkChicca E, Indiveri G, Douglas RJ. An event-based VLSI network of integrate-and-fire neurons. Presented at the Proceedings of the 2004 International Symposium on Circuits and Systems (ISCAS).The growing interest in pulse-based neural networks is encouraging the development of hardware implementations of massively parallel, distributed networks of integrate-and-fire (I&F) neurons. We have developed a mixed-mode (analog/digital) VLSI device that comprises a reconfigurable network of I&F neurons and adaptive synapses. The synapses receive input spikes and the neurons transmit output spikes (events) using an asynchronous address-event representation (AER). We describe the network architecture, present experimental data demonstrating the characteristics of the single elements on the chip, and show that a competitive network configuration has winner-take-all (WTA) behaviour and produces spike synchronization
An adaptive silicon synapse
Full text linkChicca E, Indiveri G, Douglas R. An adaptive silicon synapse. Presented at the Proceedings of the 2003 International Symposium on Circuits and Systems (ISCAS).We present an analog circuit for implementing models of synapses with short-term adaptation, derive analytical solutions for spiking input signals, and present experimental results measured from a chip fabricated using a standard 1.5 μm CMOS technology. The circuit is suitable for integration in large arrays of integrate-and-fire neurons and consequently for evaluating computational roles of short-term adaptation at the network level
A systematic method for configuring VLSI networks of spiking neurons
Full text linkNeftci E, Chicca E, Indiveri G, Douglas RJ. A systematic method for configuring VLSI networks of spiking neurons. Neural Computation. 2011;23(10):2457-2497.An increasing number of research groups are developing custom hybrid analog/digital very large scale integration (VLSI) chips and systems that implement hundreds to thousands of spiking neurons with biophysically realistic dynamics, with the intention of emulating brainlike real-world behavior in hardware and robotic systems rather than simply simulating their performance on general-purpose digital computers. Although the electronic engineering aspects of these emulation systems is proceeding well, progress toward the actual emulation of brainlike tasks is restricted by the lack of suitable high-level configuration methods of the kind that have already been developed over many decades for simulations on general-purpose computers. The key difficulty is that the dynamics of the CMOS electronic analogs are determined by transistor biases that do not map simply to the parameter types and values used in typical abstract mathematical models of neurons and their networks. Here we provide a general method for resolving this difficulty. We describe a parameter mapping technique that permits an automatic configuration of VLSI neural networks so that their electronic emulation conforms to a higher-level neuronal simulation. We show that the neurons configured by our method exhibit spike timing statistics and temporal dynamics that are the same as those observed in the software simulated neurons and, in particular, that the key parameters of recurrent VLSI neural networks (e. g., implementing soft winner-take-all) can be precisely tuned. The proposed method permits a seamless integration between software simulations with hardware emulations and intertranslatability between the parameters of abstract neuronal models and their emulation counterparts. Most important, our method offers a route toward a high-level task configuration language for neuromorphic VLSI systems
A VLSI array of low-power spiking neurons and bistable synapses with spike-timing dependent plasticity
Full text linkIndiveri G, Chicca E, Douglas RJ. A VLSI array of low-power spiking neurons and bistable synapses with spike-timing dependent plasticity. IEEE Transactions on Neural Networks. 2006;17(1):211-221.We present a mixed-mode analog/digital VLSI device comprising an array of leaky integrate-and-fire (I&F) neurons, adaptive synapses with spike-timing dependent plasticity, and an asynchronous event based communication infrastructure that allows the user to (re)con figure networks of spiking neurons with arbitrary topologies. The asynchronous communication protocol used by the silicon neurons to transmit spikes (events) off-chip and the silicon synapses to receive spikes from the outside is based on the "address-event representation" (AER). We describe the analog circuits designed to implement the silicon neurons and synapses and present experimental data showing the neuron's response properties and the synapses characteristics, in response to AER input spike trains. Our results indicate that these circuits can be used in massively parallel VLSI networks of I&F neurons to simulate real-time complex spike-based learning algorithms
Firing proprieties of an adaptive analog VLSI neuron
Full text linkBen Dayan Rubin D, Chicca E, Indiveri G. Firing proprieties of an adaptive analog VLSI neuron. Presented at the Proceedings of Bio-ADIT, Lausanne, Switzerland.We describe the response properties of a compact, low power, analog circuit that implements a model of a leaky I&F neuron, with spike-frequency adaptation, refractory period and voltage threshold modulation properties. We investigate the statistics of the circuit's output response by modulation its operating parameters, like refractory period and adaptation level and by changing the statistics of the input current. The results show a clear match with theoretical and neurophysiological data in a given range of the parameter space. This analysis defines the chip's parameter working range and predicts its behavior in case of integration into large massively parallel VLSI networks
Progetto di Ricerca finanziato nell'ambito del Programma Operativo 2007-2013 della Regione Puglia, Asse I-Linea 1.1, “Aiuti agli investimenti in ricerca per le PMI”
No full textProgetto POR in collaborazione con la ditta DIAMEC TECHNOLOGY S.r.l. - Via G. Nickmann, 12/A 70123 Bari z.i., sede operativa di Bari, Via G. Nickmann, 12/A (CAP 70123), nell’ambito di un programma di ricerca denominato SASMA - Sistema Automatico Sottomarino per Monitoraggio Ambientale ad alta precisione; tale progetto si propone tre obiettivi principali:
1. ottenere un robot autonomo subacqueo (AUV) partendo da un robot subacqueo commerciale semiautomatico di tipo filoguidato (ROV) a basso costo dotato di telecamera.
2. definizione, progettazione e realizzazione di un sistema automatico distribuito di acquisizione di parametri fisici ambientali subacquei.
3. Integrare e testare sperimentalmente i sottosistemi di cui ai due punti precedenti.
Tale proposta progettuale è inquadrata nell’ambito del Programma Operativo 2007-2013 della Regione Puglia, Asse I-Linea 1.1, “Aiuti agli investimenti in ricerca per le PMI”
A VLSI neuromorphic device for implementing spike-based neural networks
Full text linkIndiveri G, Chicca E. A VLSI neuromorphic device for implementing spike-based neural networks. Presented at the Proceedings of the 21st Italian Workshop on Neural Nets (WIRN).We present a neuromorphic VLSI device which comprises hybrid analog/digital circuits for implementing networks of spiking neurons. Each neuron integrates input currents from a row of multiple analog synaptic circuit. The synapses integrate incoming spikes, and produce output currents which have temporal dynamics analogous to those of biological post synaptic currents. The VLSI device can be used to implement real-time models of cortical networks, as well as real-time learning and classification tasks. We describe the chip architecture and the analog circuits used to implement the neurons and synapses. We describe the functionality of these circuits and present experimental results demonstrating the network level functionality
Characterizing the firing properties of an adaptive analog VLSI neuron
Full text linkBen Dayan Rubin D, Chicca E, Indiveri G. Characterizing the firing properties of an adaptive analog VLSI neuron. Biologically Inspired Approaches to Advanced Information Technology. 2004;3141:189-200.We describe the response properties of a compact, low power, analog circuit that implements a model of a leaky-Integrate & Fire (I&F) neuron, with spike-frequency adaptation, refractory period and voltage threshold modulation properties. We investigate the statistics of the circuit's output response by modulating its operating parameters, like refractory period and adaptation level and by changing the statistics of the input current. The results show a clear match with theoretical prediction and neurophysiological data in a given range of the parameter space. This analysis defines the chip's parameter working range and predicts its behavior in case of integration into large massively parallel very-large-scale-integration (VLSI) networks
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