8,704 research outputs found

    High-precision digital microflow controllers using fluidic digital-to-analog converters composed of binary-weighted flow resistors

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    This paper presents digital microllow controllers (DMFC), where a fluidic digital-to-analog converter (DAC) is used to achieve high-linearity and fine-levels in flow-rate control for applications to precise biomedical dosing systems. The fluidic DAC, composed of binary-weighted flow resistance, is designed to control the flow-rate based on the ratio of the flow resistance to achieve finer flow-rate levels. The binary-weighted flow resistance has been specified by a serial or a parallel connection of an identical flow resistor to improve the linearity of the How-rate control by making the flow-resistance ratio insensitive to the size errors of flow resistors in micromachining process. We have designed and fabricated three types of 4-digit DMFC: Prototype S and P with serial and the parallel combinations of an identical flow resistor and Prototype V with width-varied flow resistors. In the experimental study, we perform static DMFC tests at forward and backward flow conditions as well as dynamic DMFC tests at pulsating flow conditions. The present DMFC shows the nonlinearity of 5.0% and finer flow-rate levels of 16(2(N)) for 4(N) digital valves. From the measured flow-rate deviation due to micromachining errors, Prototype S and P show 27.2 % and 27.6 % of the deviation measured from Prototype V, respectively; thus, verifying that Prototype S and P are less sensitive to the micromachining errors than Prototype V

    Matrix-stripe-cache-based contiguity transform for fragmented writes in RAID-5

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    Given that contiguous reads and writes between a cache and a disk outperform fragmented reads and writes, fragmented reads and writes are forcefully transformed into contiguous reads and writes via a proposed matrix-stripe-cache-based contiguity transform (MSC-CT) method which employs a rule of consistency for,data integrity at the block level and a rule of performance that ensures no performance degradation. MSC-CT performs for reads and writes, both of which are produced by write requests from a host as a write request from a host employs reads for parity update and writes to disks in a redundant array of independent disks (RAID)-5. MSC-CT is compatible with existing disk technologies. The proposed implementation in a Linux kernel delivers a peak throughput that is 3.2 times higher than a case without MSC-CT on representative workloads. The results demonstrate that MSC-CT is extremely simple to implement, has low overhead, and is ideally suited for RAID controllers not only for random writes but also for sequential writes in various realistic scenarios

    An efficient NAND flash file system for flash memory storage

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    In this paper, we present an efficient flash file system for flash memory storage. Flash memory, especially NAND flash memory, has become a major method for data storage. Currently, a block level translation interface is required between an existing file system and flash memory chips due to its physical characteristics. However, the approach of existing file systems on top of the emulating block interface has many restrictions and is, thus, inefficient because existing file systems are designed for disk-based storage systems. The flash file system proposed in this paper is designed for NAND flash memory storage while considering the existing file system characteristics. Our target performance metrics are the system booting time and garbage collection overheads, which are important issues in flash memory. In our experiments, the proposed flash file system outperformed other flash file systems both in booting time and garbage collection overheads
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