203 research outputs found
New method for designing narrow-band reflecting filters with application in optical integration
No full textGraphene/Cu composites: Electronic and mechanical properties by first-principles calculation
No full textGraphene characterized with ultrahigh intrinsic strength and excellent electronic properties is an ideal material to reinforce metals without despairing their thermal and electrical properties. Here, the electronic and mechanical properties of graphene intercalated copper (graphene/Cu) composites are investigated using density functional theory calculations. Graphene/Cu systems present an excellent electrical conductivity and increasing Debye temperature from 335 K for pure Cu to over 535 K in regardless of stacking models. In addition to greatly enhanced Young's modulus (149%), shear modulus (156%) and bulk modulus (108%) compared to copper, the ultimate strength of graphene/Cu composites are enhanced by 174% and 162%, in x and y directions, respectively. The strengthening and toughening effects of graphene in the composites is originated from strain strengthening and load transfer, which is consistent with the experimental results. Based on this calculation, the strengthening mechanism can be understood, which explains many experimental observations and also provides us a guide to improve graphene/metal composites quality
Twin density gradient induces enhanced yield strength-and-ductility synergy in a S31254 super austenitic stainless steel
No full textGradient structure (GS), as a typical heterostructure, is arousing great interest for an improved synergy between the strength and ductility which are mutually conflicting. Recently, a novel design of GS is proposed by taking the density of twins in grains, instead of common grain size, as a gradient variable, showing the key role in strain hardening by the nano-scale twin boundaries. Following this idea, here, a deformation twin-density GS was produced by means of the technique of surface mechanical attrition treatment in a S31254 super austenitic stainless steel. To be specific, the GS consisted of a central coarse-grained (CG) core, with two sides sandwiched by the gradient-structured layer (GL), where the density of deformation twins appears gradient in grains along the depth towards the CG core. The tensile tests show that as compared to CG counterpart, yield strength in GS increases 80% to 0.5 GPa, along with comparable ductility of 36%. The interrupted tensile tests show the presence of mechanical hysteresis loops during each unload-reload cycle, indicative of the generation of heterodeformation-induced (HDI) stress during tensile deformation. Furthermore, both the HDI stress and HDI strain hardening account for a large proportion of global flow stress and forest hardening. The deformation twins and their evolutions, with the emphasis on their interaction with the dislocations, are investigated in detail by means of EBSD and TEM observations to correlate the mechanical properties. The present results shed light on the crucial role of deformation twins in the twin-density gradient for the synergistic enhancement of both strength and ductility
Structural and optoelectronic properties of selenium-doped silicon formed using picosecond pulsed laser mixing
No full textDifferences in etching characteristics of TMAH and KOH on preparing inverted pyramids for silicon solar cells
No full textGallium arsenide and indium gallium arsenide MOS devices with ALD high-k dielectrics
No full textThe search and progress for alternative gate dielectrics have attracted great attention during recent years due to every shrinking device dimensions for silicon based complementary metal-oxide-semiconductor (CMOS) industry. Meanwhile, in order to further push the performance envelope of modern transistors built on strained silicon and germanium, novel devices on III-V semiconductor materials are studied extensively as high priority alternatives. The combination of high-k dielectrics and heterogeneously grown high-mobility compound semiconductors on silicon or silicon-on-insulator (SOI) substrates could meet the growing demands on high switching speed and low operating power. Using III-V semiconductors as conducting channels, these transistors could eventually exhibit much elevated performance promised by high mobility characteristic of the compound semiconductor materials and provide an attractive alternative to silicon based devices. A study of integrating novel dielectrics on III-V semiconductors is presented, focusing on oxide dielectrics grown by atomic layer deposition (ALD) technique for high performance metal-oxide-semiconductor field effect transistor (MOSFET) applications. This study includes the fabrication and characterization of MOS capacitors, MOS depletion mode (D-mode) and enhancement mode (E-mode) field effect transistors on III-V semiconductor substrates, with strong emphasis on the E-mode MOSFET due to the fact that enhancement mode MOSFET is the technologically most important device in digital circuitry. Parallel to the research on ALD oxide MOSFETs, a novel high performance MISFET based on self-assembled organic nanodielectrics (SANDs) on gallium-arsenide (GaAs) substrate is fabricated and characterized. Capacitance-voltage and conductance voltage (C-V, G-V) measurements and electrical characterizations on dielectrics, MOSFETs and insulator-semiconductor interfaces are also presented in this study
Investigation of diffusion length distribution on polycrystalline silicon wafers via photoluminescence methods
No full textMaterial and device aspects of semiconducting two-dimensional crystals
No full textTwo-dimensional (2D) crystals have attracted much attention in recent years due to their unique physical, chemical, and mechanical properties. Semiconducting 2D crystals with van der Waals structures, such as transition metal dichalcogenides, are considered promising candidates for future device applications, as many have large band gaps, high carrier mobilities, and enable devices with immunity to short channel effects in addition to compatibility with silicon CMOS processes. In this thesis, the fundamental device implications of using semiconducting 2D crystals are investigated. This includes: 1) the optimization of device fabrication processing for better device performance, 2) comparing the device physics in 2D semiconductors based transistors and silicon MOSFET, and 3) circuit-level integration of devices using 2D semiconductors. A direct atomic layer deposition process was developed and investigated on various 2D crystals which allowed for the development of 2D semiconductor transistors. N-type MoS2 transistors with top and back gates were fabricated. The device performance of MoS2 transistors with various channel lengths down to 50 nm was studied. Metal contacts on MoS2 and other TMD materials were also studied. They showed a strong Fermi-level pinning at the metal MoS 2 interface. Device performance based on single layer CVD MoS2 channel was studied and the device on/off switching was revealed to be dominated by Schottky barriers at metal contacts. Finally, the transport properties and device performance of p-type phosphorene crystals were investigated. Semiconducting 2D crystals are very promising candidates for future electronic and optoelectronic device applications
Optimization of the emitter region and the metal grid of a concentrator silicon solar cell
No full textDependence of the optoelectronic properties of selenium-hyperdoped silicon on the annealing temperature
No full text- …
