125 research outputs found
INTEGRATED DETERRENCE: RELEVANCE & IMPLICATIONS FOR SOUTH ASIA
No full textThe US National Security Strategy of 2022 introduced a relatively new concept of Integrated Deterrence (ID) that will likely impact security discourse amongst global rivals such as the US, China, and Russia while affecting the strategic thinking of relatively smaller powers like India, Pakistan, and others. With an expanded scope and objectives, ID aims to build and integrate the entire spectrum of capabilities of the US, its allies, and partners against the perceived threat from China and possibly Russia. Resultantly, the paper focuses on implications of ID for security and strategic stability in South Asia. India, being a major strategic partner with the will to play a significant role in the US-led China containment strategy, is likely to be a major beneficiary of the new US posture of ID. With enhanced and integrated military capabilities, India is likely to adopt a more hostile posture towards its neighbours, especially Pakistan, thus forcing the latter to develop options in the form of \u27Integrated Response\u27, to help maintain strategic stability in the region without indulging in an arms race, and by maintaining neutrality in the evolving US-China great power competition.
Bibliography Entry
Sultan, Adil, Faraz Haider and Shayan Hassan Jamy. 2023. "Integrated Deterrence: Relevance & Implications for South Asia." Margalla Papers 27 (2): 71-84
INTEGRATED DETERRENCE: RELEVANCE & IMPLICATIONS FOR SOUTH ASIA
No full textThe US National Security Strategy of 2022 introduced a relatively new concept of Integrated Deterrence (ID) that will likely impact security discourse amongst global rivals such as the US, China, and Russia while affecting the strategic thinking of relatively smaller powers like India, Pakistan, and others. With an expanded scope and objectives, ID aims to build and integrate the entire spectrum of capabilities of the US, its allies, and partners against the perceived threat from China and possibly Russia. Resultantly, the paper focuses on implications of ID for security and strategic stability in South Asia. India, being a major strategic partner with the will to play a significant role in the US-led China containment strategy, is likely to be a major beneficiary of the new US posture of ID. With enhanced and integrated military capabilities, India is likely to adopt a more hostile posture towards its neighbours, especially Pakistan, thus forcing the latter to develop options in the form of 'Integrated Response', to help maintain strategic stability in the region without indulging in an arms race, and by maintaining neutrality in the evolving US-China great power competition.
Bibliography Entry
Sultan, Adil, Faraz Haider and Shayan Hassan Jamy. 2023. "Integrated Deterrence: Relevance & Implications for South Asia." Margalla Papers 27 (2): 71-84
Endurance characterization and improvement of floating gate semiconductor memory devices:
No full textLow power consumption, virtually zero latency, extremely fast boot-up for OS and applications, fast data access, portability, and high shock resistance are some of many reasons that make Flash memory devices an ideal choice for a vast variety of consumer electronics. Flash memory is a specific type of non-volatile EEPROM. A typical Flash memory cell looks similar to a MOSFET, except that it has a dual-gate structure. Flash memory cells use the principle of threshold voltage modulation to alter the channel current (Ids) when a reference read voltage (Vread) is applied to the control gate. Different levels of Ids are, in turn, interpreted as unique logic states. Fowler-Nordheim tunneling is used to achieve threshold voltage modulation in NAND Flash memory cells.
Despite its high performance potential, NAND Flash memory suffers from the drawback of limited program/erase endurance. High field/current stress caused by Fowler-Nordheim tunneling (during program/erase cycling) leads to tunnel oxide degradation, which eventually limits the endurance characteristics of NAND Flash memory cells. One of the most significant tunnel oxide degradation mechanisms is charge trapping. This work is devoted to the study of charge trapping and its effects on the endurance characteristics and reliability of NAND Flash memory devices. Cell threshold voltage shift and memory window narrowing, a direct consequence of tunnel oxide degradation caused by charge trapping, are typical failure modes in NAND Flash memory cells.
In this work, endurance characterization of NAND Flash memory devices and a detailed analysis has been conducted reconfirming the issue of limited program/erase endurance. Subsequently, a novel NAND Flash memory cell design has been proposed which eliminates tunnel oxide degradation caused by Fowler-Nordheim tunneling. Device simulations (using the Sentaurus TCAD tool suite by Synopsys®, Inc.) and corresponding analysis show that, as compared to conventional cells, the proposed cell design offers a 10 times reduction in intrinsic threshold voltage shift. That, according to the measured endurance characteristics of cells fabricated in this work, translates to an improvement of over 200 times in program/erase endurance. In a nutshell, the proposed cell design offers superior reliability and endurance as compared to conventional NAND Flash memory cells.M.S.Includes bibliographical references (p. 113-116)by Faraz Kha
Children line up for measurements and interviews at a government-run public school in Karachi.
No full text<p>Photo Courtesy: Haider Warraich.</p
Faisal Javed measures the height and weight of a child at a private school in Karachi.
No full text<p>Photo Courtesy: Haider J Warraich.</p
Compact Sparse Merkle Trees
No full textA Sparse Merkle tree is based on the idea of a complete Merkle tree of an intractable size. The assumption here is that as the size of the tree is intractable, there would only be a few leaf nodes with valid data blocks relative to the tree size, rendering the tree as sparse. We present a novel approach called Minimum distance path algorithm to simulate this Merkle tree of intractable size which gives us efficient space-time trade-offs. We provide the algorithms for insertion, deletion and (non -) membership proof for a leaf in this Compact Sparse Merkle tree
Compact Sparse Merkle Trees
No full textA Sparse Merkle tree is based on the idea of a complete Merkle tree of an intractable size. The assumption here is that as the size of the tree is intractable, there would only be a few leaf nodes with valid data blocks relative to the tree size, rendering the tree as sparse. We present a novel approach called Minimum distance path algorithm to simulate this Merkle tree of intractable size which gives us efficient space-time trade-offs. We provide the algorithms for insertion, deletion and (non -) membership proof for a leaf in this Compact Sparse Merkle tree
Compact Sparse Merkle Trees
No full textA Sparse Merkle tree is based on the idea of a complete Merkle tree of an intractable size. The assumption here is that as the size of the tree is intractable, there would only be a few leaf nodes with valid data blocks relative to the tree size, rendering the tree as sparse. We present a novel approach called Minimum distance path algorithm to simulate this Merkle tree of intractable size which gives us efficient space-time trade-offs. We provide the algorithms for insertion, deletion and (non -) membership proof for a leaf in this Compact Sparse Merkle tree
Compact Sparse Merkle Trees
No full textA Sparse Merkle tree is based on the idea of a complete Merkle tree of an intractable size. The assumption here is that as the size of the tree is intractable, there would only be a few leaf nodes with valid data blocks relative to the tree size, rendering the tree as sparse. We present a novel approach called Minimum distance path algorithm to simulate this Merkle tree of intractable size which gives us efficient space-time trade-offs. We provide the algorithms for insertion, deletion and (non -) membership proof for a leaf in this Compact Sparse Merkle tree
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