85 research outputs found

    Security in Approximate Computing and Approximate Computing for Security: Challenges and Opportunities

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    Approximate computing is an advanced computational technique that trades the accuracy of computation results for better utilization of system resources. It has emerged as a new preferable paradigm over traditional computing architectures for many applications where inaccurate results are acceptable. However, approximate computing also introduces security vulnerabilities mainly due to the fact that the uncertain and unpredictable intrinsic errors during approximate execution may be indistinguishable from malicious modification of the input data, the execution process, and the results. On the other hand, interestingly, approximate computing presents new opportunities to secure the system and the computation. Existing work on the security of approximate computing covers threat models, countermeasures, and evaluations but lacks a framework for analysis and comparison. In this article, we provide a classification of the state-of-the-art works in this research field, including threat models in approximate computing and promising security approaches using approximate computing. Open questions and potential future research directions are also discussed

    Radio Frequency Fingerprints vs. Physical Unclonable Functions - Are They Twins, Competitors, or Allies?

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    Privacy breaches and online frauds are grave concerns in pervasive computing. Device identification is the first line of defense to detect and stop fraud. Conventional device authentication schemes using software addresses as identities or static pre-programmed secret keys are vulnerable to tampering and memory attacks. This article reviews two emerging lightweight hardware-oriented solutions to avoid these problems, namely radio frequency fingerprint (RFF) identification and physical unclonable function (PUF) authentication. Their operating principles and protocols are first introduced, followed by a scrutiny of their common and distinctive features, and a discussion of the stumbling blocks in the way of their market adoption. Finally, we envisage a combined mutual authentication and key establishment scheme to shed light on their synergy

    Ultra-Compact and Robust FPGA-Based PUF Identification Generator

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    Physically Unclonable Functions (PUFs), exploit inherent manufacturing variations and present a promising solution for hardware security. They can be used for key storage, authentication and ID generations. Low power cryptographic design is also very important for security applications. However, research to date on digital PUF designs, such as Arbiter PUFs and RO PUFs, is not very efficient. These PUF designs are difficult to implement on Field Programmable Gate Arrays (FPGAs) or consume many FPGA hardware resources. In previous work, a new and efficient PUF identification generator was presented for FPGA. The PUF identification generator is designed to fit in a single slice per response bit by using a 1-bit PUF identification generator cell formed as a hard-macro. In this work, we propose an ultra-compact PUF identification generator design. It is implemented on ten low-cost Xilinx Spartan-6 FPGA LX9 microboards. The resource utilization is only 2.23%, which, to the best of the authors' knowledge, is the most compact and robust FPGA-based PUF identification generator design reported to date. This PUF identification generator delivers a stable range of uniqueness of around 50% and good reliability between 85% and 100%

    Riben di guo xia Riben yu Taiwan zhi zhi an fa lü bi jiao yan jiu: yi Taiwan ren de fa lü di wei wei zhong xin = A comparative study of the security laws in Japan and colonial Taiwan under the Japanese empire : the legal status of Taiwanese as the main reference.

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    自1840年清廷與英國簽訂《南京條約》以來,長久以來東亞地區傳統國家對於人身的掌握方式以及以朝貢冊封作為手段所建立的天下秩序便日漸被削弱且重新被編入近代西方國際法秩序之中。在此過程中,當時的東亞各國,皆曾嘗試一方面遵行近代西方的國際法秩序,一方面使用西式的法律將自身塑造為符合西方意義下的近代國家以達到可以完全在其「國」內外掌控其臣民之人身並同時受到西方列強所承認的目的。而所謂的近代西方國際法秩序,特別是在其秩序下主權國家所代表的對外擁有獨立性以及對內之臣民與領土擁有排他性權力等特質,更被明治維新之後的日本政治家與知識分子視為是國體存在的憑藉與證明,是使日本得以與歐美列強建立平等外交關係的前提之一。換句話說,日本近代法秩序中具有明顯地使日本作為一個主權國家融入近代西方國際法秩序的企圖。然而自1890年《大日本帝國憲法》正式實施以來,日本先後在甲午戰爭以及日俄戰爭後領有臺灣與朝鮮。日本帝國在法律上所須支配的範圍不再僅限於日本列島,同時更包含了以上在帝國轄下這些地域的人身流動。在此種情況下,本研究企圖解決兩個問題,即:第一,當時什麼是「臺灣人」?而臺灣人在帝國內被日本政府以法律的方式賦予怎樣的法律地位?而這個法律地位在治安法律的適用上與帝國內的其他人群,特別是日本內地人之間又具有怎樣的差別,而其成因又是什麼?第二,當《治安維持法》作為當時日本帝國下日本與臺灣兩地域所共同擁有的治安法律時,帝國的裁判機構是如何根據帝國下各地域在地社會的情形而處理在各地域的治安法律案件的?而這些法院的判例又對於當時「臺灣人」族群意識的形成具有怎樣的影響?以及這些法律關係對於了解整個日本帝國的發展所具有的意義上有什麼幫助?而經由本研究,筆者得出結論,認為帝國下的「臺灣人」的法律地位與其治安法律的適用是與日本帝國權力秩序之結構有著深刻的關係。而當時帝國權力秩序之結構事實上即是近代西方國際法秩序在東亞的滲透、天皇制國家的國體論述、兩地各自過往治安法律的實施背景,以及當時日本國內外的臨時事件的各個因素所形成的,並且影響了「臺灣人」作為一個族群意識的形成。Ever since the mid-19th century, the traditional East Asian Hua Yi (華夷) system has been weakening and was re-incorporated into the modern Western world order because of the rise of the Western powers. This process not only broke the old ruling order (in East Asia connected through the Tribute system), but also made the East Asia countries greatly shaped by the new concept of the International Law, for example the equal status between all sovereign states and the sovereign states had exclusive authorities over their people and territories. In this trend, Japan, China, and other East Asian countries were to some extent, tried to not only comply with the order of the International Law, but also made themselves a sovereign state recognized by the Western powers in order to avoid their diplomatic intervention using the excuse of different concept of law.In this pursuit, the legal system, particularly the characteristics in the constitution that a country owning a constitution was independent from external interferences and superior to domestic affairs have attracted many Japanese intellectuals and politicians in the Meiji period (1868-1912). They thought that to have a constitution was the qualification for a sovereign state, and also was a demonstration that Japan had the same rights as the Western powers. In other words, the Japanese modern legal system had the motivation that to construct Japan as a sovereign state under the umbrella of the International Law. However, after Japan’s acquisition of Taiwan, Japan was enlarged. Apart from the Japanese isles, there were newly conquered regions. In this condition, an overarching concern throughout the whole pre-war period was how to transform the Japanese modern legal system from a legal system based on the concept of constructing Japan as a sovereign state into an empire legal system so that they could not only include the colony and the colonized subjects but also accord with the International Law.This study attempts to investigate the establishment and applicability of the Security Laws in Japanese territory and Taiwan, to learn how different legal status between Taiwanese and Japanese in different times for different purposes in terms of legal issues. This study contributes to the study of the Imperial Japanese history. The methodologies are based on textual history and historical sociological theories to analyze the legal status of the Taiwanese under the Japanese Empire.Detailed summary in vernacular field only.Detailed summary in vernacular field only.Detailed summary in vernacular field only.齊崇硯.Parallel title from English abstract.Thesis (M.Phil.) Chinese University of Hong Kong, 2015.Incluwldes bibliographical references (leaves 126-131).Abstracts also in English.Qi Chongyan

    Improved Reliability of FPGA-based PUF Identification Generator Design

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    Physical unclonable functions (PUFs), a new form of physical security primitive, enable digital identifiers to be extracted from devices, such as field programmable gate arrays (FPGAs). Many PUF implementations have been proposed to generate these unique n-bit binary strings. However, they often offer insufficient uniqueness and reliability when implemented on FPGAs, and can consume excessive resources. To address these problems, in this paper we present an efficient, lightweight and scalable PUF identification (ID) generator circuit that offers a compact design with good uniqueness and reliability properties, and is specifically designed for FPGAs. A novel post-characterisation methodology is also proposed, which improves the reliability of a PUF without the need for any additional hardware resources. Moreover, the proposed postcharacterisation method can be generally used for any FPGA-based PUF designs. The PUF ID generator consumes 8.95% of the hardware resources of a low-cost Xilinx Spartan-6 LX9 FPGA and 0.81% of a Xilinx Artix-7 FPGA. Experimental results show good uniqueness, reliability, and uniformity with no occurrence of bit-aliasing. In particular, the reliability of the PUF is close to 100% over an environmental temperature range of 25 oC to 70 oC with ±10% variation in the supply voltage

    Lightweight cryptographic identity solutions for the internet of things

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    With the increasing emergence of pervasive electronic devices in our lives, the Internet of Things (IoT) has become a reality with its influence on our day to day activities set to further increase with a projected 50 billion connected devices by the year 2020 [8]. These smart devices and sensors will be found in our homes, our cars, our workplaces, etc., and have the potential to revolutionise how we interact with the world today. The slew of data generated by such a volume of devices necessitates the use of smart, autonomous machine-to-machine (M2M) communications; however, this necessarily poses serious security and privacy issues as we will no longer have direct control over with whom and what our devices communicate. This could potentially open up new attack vectors for criminal hackers to exploit through the use of malicious or tampered IoT devices. Compounding the problem is that to enable the ubiquitous nature of the IoT, the embedded devices themselves are often low-cost, low-power, throwaway units which are restricted both in memory and computing power. Generally, low-cost devices targeted at the IoT space, such as the ARM Cortex-M or the Atmel tinyAVR families of microcontroller units (MCUs), contain little if any embedded security features. Their lightweight nature is such that even highly optimised cryptographic implementations targeted at specific MCU still require a significant timing, and corresponding energy, overhead [9]. Hence, it is clear we need a new approach to securing the IoT. In this chapter, we outline the proposed use of Physical Unclonable Functions (PUFs) for the provision of IoT device security.</p

    FPGA-based Strong PUF with Increased Uniqueness and Entropy Properties

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    Physical unclonable functions (PUFs), are a type of physical security primitive which enable identification and authentication of hardware devices, such as field programmable gate arrays (FPGAs) and application specific integrated circuits(ASICs). They exploit the random process varia tions that occur during manufacturing to create an intrinsic identifier or response unique to the physical hardware itself. Arbiter PUFs were the first proposed Strong PUF and are also widely studied. However, these designs often suffer from poor uniqueness and reliability characteristics leaving them vulnerable to modeling attacks, aswell as being difficult to implement on FPGAs due to the physical layout restrictions. Some more recent designs based around nonlinear voltage transfer characteristics, or non-linear currents improve the resistance against modeling attacks. However they can only be implemented on ASICs due to their voltage/current requirements. To address this problem, we propose a new PUFcircuit that offers a significantly higher theoretical entropy than the traditional Arbiter PUF construction, and which is specifically designed for FPGAs. The proposed work is verified on a low-cost Nexys4 board which contains a Xilinx Artix-7 FPGA fabricated at 28nm. The experimental results give a uniqueness of 20 %, considerably higher than the reported 9 % of a traditional Arbiter PUF design, and an expected reliability of ≈ 96 % over an environmental temperature range of 0 o C to 75 o C, with a reliability of ≈ 92 % with ±10 % variation in supply voltage

    A unique and robust single slice FPGA identification generator

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    In this paper, a new field-programmable gate array (FPGA) identification generator circuit is introduced based on physically unclonable function (PUF) technology. The new identification generator is able to convert flip-flop delay path variations to unique n-bit digital identifiers (IDs), while requiring only a single slice per ID bit by using 1-bit ID cells formed as hard-macros. An exemplary 128-bit identification generator is implemented on ten Xilinx Spartan-6 FPGA devices. Experimental results show an uniqueness of 48.52%, and reliability of 92.41% over a 25°C to 70°C temperature range and 10% fluctuation in supply voltag
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