145,868 research outputs found
Amitav Ghosh: Welten Imaginieren
No full textWas hat die Muskatnuss mit Klimawandel zu tun? Oder Mohn mit Kapitalismus?
Wie kaum ein Anderer vermag der indische Schriftsteller Amitav Ghosh, globale Verflechtungen und Widersprüche in Worten auszudrücken. In seinen Romanen und Sachbüchern verbindet er koloniale Geschichte(n) auf fundierte und fantastische Weise mit aktuellen Fragen zu Migration, globaler Ungleichheit und zur weltweiten Klimakrise. Wortgewaltig lässt er uns in längst vergessene Geschichten und unbekannte Welten eintauchen, um die globalen Herausforderungen der Gegenwart neu zu betrachten.
In Bern liest Amitav Ghosh aus seinen Werken und tritt in einen Dialog mit Stimmen aus Forschung, Aktivismus und Kultur
Capturing sleep–wake cycles by using day-to-day smartphone touchscreen interactions
No full textJay N. Borger, Reto Huber & Arko Ghosh (2019) NPJ Digital Medicin
Dataset for the journal paper titled "Low loss polycrystalline SiGe core fibers for nonlinear photonics"
No full textThis dataset supports the publication:
Amar N. Ghosh, Meng Huang, Thomas W. Hawkins, John Ballato, Ursula J. Gibson, and Anna C. Peacock (2024)
Low loss polycrystalline SiGe core fibers for nonlinear photonics
Optics Express
Description:
The excel file contains all experimental data used for generating Fig. 2, Fig. 3b & 3c, Fig. 4, Fig. 5 and Fig. 6.
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Dataset for the journal paper titled "Low-temperature polycrystalline silicon waveguides for low loss transmission in the near-to-mid-infrared region"
No full textThis dataset supports the publication: Amar N. Ghosh, Stuart J. MacFarquhar, Ozan Aktas, Than S. Saini, Swe Z. Oo, Harold M. H. Chong, and Anna C. Peacoc (2022)
Low-temperature polycrystalline silicon waveguides for low loss transmission in the near-to-mid-infrared region. Optics Express. The excel file contains all experimental data used for generating Fig.3 and Fig.6.</span
Determination of kinetic parameters from calorimetric study of solid state reactions in 7150 Al-Zn-Mg alloy
No full textDifferential scanning calorimetric (DSC) study was carried out at different heating rates to examine the solid statereactions in a 7150 Al-Zn-Mg alloy in water-quenched (WQ) state, naturally and artificially aged tempers. The exothermic and endothermic peaks of the thermograms indicating the solid state reaction sequence were identified. The shift of peak temperatures to higher temperatures with increasing heating rates suggests that the solid state reactions are thermally activated and kinetically controlled. The artificial aging behaviour of the alloy was assessed by measuring the variations of hardness with aging time. The fraction of transformation (Y), the rate of transformation (dY/dt), the transformation function f(Y), and the kinetic parameters such asactivation energy (Q) and frequency factor (k0) of all the solid state reactions in the alloy were determined by analyzing the DSC data, i.e. heat flow involved with the corresponding DSC peaks. It was found that the kinetic parameters of the solid state reactions are in good agreement with the published data.<br/
New Algorithms and Lower Bounds for Streaming Tournaments
No full textWe study fundamental directed graph (digraph) problems in the streaming model. An initial investigation by Chakrabarti, Ghosh, McGregor, and Vorotnikova [SODA'20] on streaming digraphs showed that while most of these problems are provably hard in general, some of them become tractable when restricted to the well-studied class of tournament graphs where every pair of nodes shares exactly one directed edge. Thus, we focus on tournaments and improve the state of the art for multiple problems in terms of both upper and lower bounds.
Our primary upper bound is a deterministic single-pass semi-streaming algorithm (using Õ(n) space for n-node graphs, where Õ(.) hides polylog(n) factors) for decomposing a tournament into strongly connected components (SCC). It improves upon the previously best-known algorithm by Baweja, Jia, and Woodruff [ITCS'22] in terms of both space and passes: for p ⩾ 1, they used (p+1) passes and Õ(n^{1+1/p}) space. We further extend our algorithm to digraphs that are close to tournaments and establish tight bounds demonstrating that the problem’s complexity grows smoothly with the "distance" from tournaments. Applying our SCC-decomposition framework, we obtain improved - and in some cases, optimal - tournament algorithms for s,t-reachability, strong connectivity, Hamiltonian paths and cycles, and feedback arc set.
On the other hand, we prove lower bounds exhibiting that some well-studied problems - such as (exact) feedback arc set and s,t-distance - remain hard (require Ω(n²) space) on tournaments. Moreover, we generalize the former problem’s lower bound to establish space-approximation tradeoffs: any single-pass (1± ε)-approximation algorithm requires Ω(n/√{ε}) space. Finally, we settle the streaming complexities of two basic digraph problems studied by prior work: acyclicity testing of tournaments and sink finding in DAGs. As a whole, our collection of results contributes significantly to the growing literature on streaming digraphs
Towards Blackbox Identity Testing of Log-Variate Circuits
No full textDerandomization of blackbox identity testing reduces to extremely special circuit models. After a line of work, it is known that focusing on circuits with constant-depth and constantly many variables is enough (Agrawal,Ghosh,Saxena, STOC'18) to get to general hitting-sets and circuit lower bounds. This inspires us to study circuits with few variables, eg. logarithmic in the size s.
We give the first poly(s)-time blackbox identity test for n=O(log s) variate size-s circuits that have poly(s)-dimensional partial derivative space; eg. depth-3 diagonal circuits (or Sigma wedge Sigma^n). The former model is well-studied (Nisan,Wigderson, FOCS'95) but no poly(s2^n)-time identity test was known before us. We introduce the concept of cone-closed basis isolation and prove its usefulness in studying log-variate circuits. It subsumes the previous notions of rank-concentration studied extensively in the context of ROABP models
Partial Reconfiguration Feature in Crypto Algorithm for Cloud Application
No full textThe implementation of crypto algorithm in general-purpose computing platforms involves security protocols, secured storage, digital certificates, secure execution, digital right management, etc. The present researchers undertook systematic design explorations to implement various crypto issues in hardware in concurrence with the generation changes taking place in FPGA technology including the latest dynamic reconfigurable embedded platform. The partial reconfigurable hardware platform is an advanced and latest version in the growth path of FPGA technology and implementation of various crypto issues in such a system is an important area of today’s research interest. The performance of a software crypto implementation in processors usually takes extensive execution time, while the same implemented in hardware takes much lesser time as well as performs in much cost-effective manner in respect of resource usage and power. Hence, a new approach has to be adopted to design such systems based on metrics involving resource usage, throughput, and power along with adequate security. This new solution to security leads to an issue of optimization of crypto processors which can balance both the hardware and security issues of modern crypto systems. This paper explores three generations of crypto solutions. The upgradation issue of the generation of crypto solutions comes from the changing trend of FPGA technology as well as the crypto systems. The first-generation crypto system operated in processors has less efficiency and is more vulnerable to security, whereas the second generation operated in embedded hardware comes with more security, poor flexibility, and higher design complexity. The third generation using PR platform provides an optimum balance between first- and second-generation crypto solutions leading to high flexibility time and high efficiency. In this paper, we implement third-generation crypto hardware in a fog system which is placed between IoT device and cloud. The adoption of fog in existing architecture reduces the processing cost of the cloud. ISE14.4 suite with ZYNQ7z020-clg484 FPGA platform is used to implement third-generation crypto core
Ghosh (A.) - Planning Programming and Input Output Models.
No full textGoergen Alain. Ghosh (A.) - Planning Programming and Input Output Models.. In: Revue économique, volume 22, n°3, 1971. p. 542
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