1,721,015 research outputs found
Forming Gas Anneal effect on plasma-induced damage: beyond the appearances
Indispensable for manufacturing of modern CMOS technologies, plasma processes result in charging of dielectric surfaces, thus damaging the gate oxide. A forming gas annealing (FGA) step is usually done at the end of the process to passivate and/or recover this damage. We investigated this problem on thin (3.5 nm) gate oxides by using a series of stress-anneal-stress steps on devices with different level of latent damage. Our results confirm that FGA actually reduces the number of traps responsible for stress-induced leakage current (SILC) or for microbreakdown in ultrathin gate oxides, but also put in evidence that defects induced by plasma treatments and those generated by way of electrical stress feature different anneal kinetics. Further, we have identified two categories of dielectric breakdown events, whose characteristics are strongly modified by the FGA step
Plasma-induced Micro Breakdown in small area MOSFETs
Plasma treatments, indispensable for manufacturing of ULSI integrated circuits, may lead to a latent damage in gate oxides of CMOS components. Latent damage may endanger the device long-term reliability, which is usually tested over large area MOS devices. In this work, we investigated the impact of latent plasma induced damage on the reliability of nMOSFETs with small gate area and gate oxide thickness of 3.2 nm. To this purpose, we stressed 1,500 devices with different antenna areas by using a staircase-like stress voltage, and by monitoring the gate leakage at the gate voltage VG=2V. The stress was always stopped because of an abrupt jump in the gate current. The statistics obtained for the breakdown current is characterized by two different oxide breakdown modes. The first is the well-known HardBreakdown, while the second one, which we called Micro Breakdown, can be modeled as a Double Trap Assisted Tunneling mechanism, and is characterized by a very small leakage current (around 100pA at the gate voltage VG=2V). In devices with large antenna, i.e., more prone to be damaged by plasma processing, the number of micro broken oxides is larger and breakdown occurs at lower voltages than in reference devices (non plasma damaged). For converse, the Hard Breakdown statistics shows only a weak dependence on the gate antenna ratio of plasma damaged devices. This has been explained by considering the intrinsic nature of latent plasma-induced oxide defects, linkedto the different generation mechanisms involved in Micro Breakdown and Hard Breakdown phenomena
Biochip electroporator and its use in multi-site, single-cell electroporation
The introduction of genetic material or molecules of biological interest into cells is a procedure with an increasing interest both for experimental and application purposes, so that electroporation is a widely used technique, but the electroporation of single adhering cells is still impaired. The present application describes an apparatus for the electroporation of any kind of cell adhering to a substrate at any stage of development, where an electrical signal can be driven and applied to a single adhering cell in culture in order to obtain its electroporation. The method to electroporate a single adhering cell with the apparatus of the invention is also described
Low field latent plasma damage depassivation in thin oxide MOS
A novel plasma-process induced damage depassivation method is proposed. Using a staircase-like stress voltage and varying the stress time, we were able to depassivate the latent damage at very low-field on both nMOS and pMOS devices. The dynamic of the interface traps generation is studied; pMOS devices show a peculiar behavior, which can be explained understanding the mechanisms involved in damage depassivation. The energy of carriers is identified as the damaging factor
Correlation Between Soft Breakdown and Plasma Process Induced Damage
The correlations between soft breakdown (SB) and plasma process induced damage of devices with ultra-thin gate oxides were presented. A stress and test methodology was proposed to analyze SB due to sudden decrease in gate voltage during a constant current stress. The voltage used for measurements was kept small to avoid Fowler-Nordheim tunneling. The analysis suggested the dependence of cummulative failure distribution on antenna ratio. It was found that the use of low voltages caused more localized damage and increased the chance trigger SB spot into conduction
Radiation induced leakage current in floating gate memory cells
Single ions impacting on SiO2 layers generate tracks of defects which may result in a Radiation Induced Leakage Current (RILC). This current is usually studied as the cumulative effect of ion-induced defects in capacitors with ultra-thin oxides. We are demonstrating and modeling this phenomenon in 10 nm oxides by using Floating Gate memories. The impact of a single, high-LET ion can result in severe retention problems, due to several electrically active defects, which cooperate to slowly discharge the FG. We are also proposing innovative simulation tools to reproduce this phenomenon. Results from simulations fully explain our results, and also agree with existing data on thinner (4 nm) oxides
Radiation Induced Charge Loss Mechanisms Across the Dielectrics of Floating Gate Flash Memories
One of the key factors permitting the extraordinary success offloating gate (FG) nonvolatile memories relies on the excellentinsulating properties of the dielectric layers surrounding theFG itself. Among other threats, ionizing radiation mayeffectively affect such insulating characteristics, leading to adegradation of the FG stored charge. Radiation effects have beentraditionally studied for niche applications such as the highenergy physics or the satellite industry. However, modernsemiconductor technologies are becoming more and more sensitiveto the deposition of small amounts of charge, such as thosegenerated by the byproducts of atmospheric neutrons, and FGmemories are in fact aggressively scaled following Moore's lawpredictions. Loss of information may derive from two broadcategories of phenomena, Total Ionizing Dose and Single EventEffect, whose actions on the FG dielectrics are reviewed in thiscontribution from the viewpoints of the prompt induced damageand long-term degradation effects, affecting the memoryretention capabilities
Single Event Charge Loss in EPROMs
In this summary we are showing preliminary but
important and new results obtained in EPROM arrays
after high-LET ion irradiation. These devices are
characterized by larger integration density and thicker
tunnel oxide than Flash memories [15-16]. Moreover,
these device are designed to store information for very
long times, not for frequent refresh of information, or
for on-site reprogramming. As a consequence, target
applications are different from those of Flash, too.
Nevertheless, we are showing that, if devices are
subjected to heavy ion irradiation (as can happen
during long space missions) the information stored in
EPROM are as vulnerable as those stored in Flash
memories [15]
ISFET-based detection of cDNA perfect or partial matching kinetics
Microelectronic devices can be fruitfully used for DNA hybridization detection: in this work we show that a Si-based n-ISFET (Fig.1) can detect surface potential changes resulting from the surface adsorption of charged molecules in aqueous environment.
To promote cDNA adhesion the gate dielectric was coated with poly-L-lysine at 0.2%. When a probe cDNA was bound to the poly-L-lysine layer the ISFET drain current ID decreased, and this effect was further enhanced when a complementary target DNA was later bound to the corresponding probe (fig.2). We evaluated the DNA quantity retained on the gate area as a function of different probe concentrations by measuring the ID shift (fig.3): noticeably all binding sites were already saturated with the lowest probe density.
We used our ISFETs to evaluate the different hybridisation kinetics of perfect matching or partial matching targets. We performed a preliminary temperature calibration of our devices in order to account for electrical effects related to the operating temperatures used in the hybridisation experiments (Fig.4).
The normalized shift of the drain current (ƒ ́ID/ID) is reported in Fig.5 for two different targets. Parasitic effects due to temperature have been properly subtracted. For the perfect match target (whole experiment at 22¢XC) the drain current abruptly and quickly fells, remaining almost constant at about 20% of its initial value. Conversely, for partially matching target the current fells slowly at 22C, as expected from a-specific chemical bonds between the target and the probe DNA. Once the temperature rose to 70¢XC most of (but not all) a-specific bonds are broken.
The different kinetics shown in Fig. 5 demonstrate that ISFET is able to discriminate between specific and a-specific hybridisation of DNA targets to DNA probes fixed on their surfaces with good electrical and temporal experimental sensitivity for a thorough investigation of the occurring phenomen
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