1,721,103 research outputs found
Correlation between Substrate Hot Electron Energy and Homogeneous Degradation in n-MOSFETs
No full text
Development of an analytical mobility model for the simulation of uktra thin SOI MOSFETs
No full textMonte-Carlo analysis of signal propagation delay and AC performance of decananometric bulk and double-gate MOSFETs
No full textA time-dependent simulation procedure has been implemented in a state of the art Monte-Carlo device simulator that includes quantum corrections, and applied to the evaluation of the RF performance of bulk and ultra-thin-body double-gate (UTB-DG) MOSFETs with L-G = 25 nm. The analysis focuses on the evaluation of the signal delay along the channel and of the admittance matrix at the device terminals. The performance of the bulk and UTB-DG MOSFETs are compared; the latter provides a significantly larger transition frequency (F-T), due to the larger trans-conductance and much lower total drain capacitance, thanks to suppressed junction capacitance
Three dimensional effects in dynamically triggered CMOS latch-up
No full textAn analysis of three-dimensional (3-D) effects in CMOS latchup under dynamic conditions that expands on previous work limited to steady state is presented. Measurements of the minimum duration of voltage pulses and the ramp slew rate needed to induce latchup and have been performed on devices of different widths and layouts, and the latchup susceptibility to transient stimuli has been found to depend on the device dimensions and geometry. By means of simple analytical models it is shown that such a dependence originates from the nonideal scaling of the distributed resistances and capacitances due to the 3-D nature of the structure terminating region
A novel approach to analyze the reliability of GaN power HEMTs operating in a DC-DC Buck converter
Full text linkIn this paper, we present a novel testbed based on a DC-DC synchronous Buck power converter, allowing the reliability analysis of GaN HEMTs with p-type gate. In particular, it is possible to monitor the drift of the device parameters to highlight the main degradation mechanisms affecting GaN transistors in power electronic applications. Stress is applied when HEMTs work within a practical 48/12V DC-DC converter operating at 1 MHz switching frequency and 4A output current. The reported analysis has been carried out under two different conditions, namely soft and hard stress, inducing a relatively low and high junction temperature, respectively. Results show that the high-side transistor of a DC-DC Buck converter is more prone to degradation, due to a larger threshold voltage and on-resistance drift. Moreover, based on the results of a validation analysis of the proposed characterization approach, the gate stack appears as the weaker transistor region causing device failure in the case of hard stress. Finally, a completely recoverable and a permanent VTH and RON drift is observed in the case of soft and hard stress, respectively
Low Field Electron and Hole Mobility of SOI Transistors Fabricated on Ultra-Thin Silicon Films for Deep Sub-Micron Technology Application
No full textRevised Stability Analysis of the Nonlinear Poisson Scheme in Self-Consistent Monte Carlo Device Simulations
No full textIn this paper, the stability of self-consistent Monte
Carlo (MC) device simulations is revised by developing a model
that extends the existing ones by accounting for the effect of
a carrier diffusion. Both the linear and the nonlinear Poisson
schemes have been considered. The analysis of the linear Poisson
scheme reveals that, consistently with the availablemodel, the time
step between two Poisson solutions must be short compared to a
factor proportional to the scattering rate. On the other hand, it
has been found that, contrary to the available stability models,
the nonlinear Poisson scheme requires long time steps in order to
provide stable simulations. For this reason, the nonlinear scheme
is advantageous when considering steady-state simulations. The
model predictions have been verified by comparison with MC
simulations implementing both schemes
- …
