214 research outputs found
Combined effect of loop delay and reference clock jitter in first-order digital bang-bang phase-locked loops
No full textPaper presented at the IEEE International Symposium on Circuits and Systems (ISCAS), Taipei, Taiwan, 24-27 May 2009Recently, several digital phase-locked loops (DPLLs) have been demonstrated to achieve the jitter performance of traditional
charge-pump-based analog PLLs. This paper is concerned with a class of DPLLs employing a binary-quantized phase detector, referred to as bangbang PLLs (BBPLLs). They are widely used in clock and data recovery circuits and have recently been implemented as digital BBPLLs for high-bandwidth synthesis. Given that a DPLL implementation typically suffers
from (excess) loop delay, this paper investigates the combined effect of loop delay and reference clock jitter in a first-order digital BBPLL. To statistically characterize the loop’s timing jitter we formulate it as a discrete-time vector Markov process and numerically solve the associated Chapman-Kolmogorov equation. This allows us to compute the timing jitter probability density function in steady-state and to evaluate the jitter performance (timing offset and RMS timing jitter) for varying loop detuning, RMS reference clock jitter and loop delay.Science Foundation Irelandke, ab, co, li - TS 13.04.1
Output-jitter performance of second-order digital bang-bang phase-locked loops with nonaccumulative reference clock jitter
No full textBang-bang phase-locked loops (BBPLLs) are inherently nonlinear systems due to the binary phase detector (BPD). While they are typically used for clock and data recovery, the ongoing trend toward digital loop implementations has resulted in several digital BBPLLs (DBBPLLs) suitable for frequency synthesis. This brief investigates the effect of nonaccumulative reference clock jitter (due to white phase noise) in second-order DBBPLLs, comparing the output jitter with that of first-order DBBPLLs. For small clock jitter, the nonlinear loop behavior is modeled as a two-dimensional Markov chain, and the output jitter is smaller than but close to that of a first order loop. For large clock jitter, the BPD nonlinearity is linearized, and the output jitter is larger than that of a first order loop; it is proportional to clock jitter and inversely proportional to the square root of the stability factor—the ratio of the proportional path gain to the integral-path gain of the digital loop filter.Science Foundation Irelandti, ke, ab, li - TS 18.04.1
Phase jitter dynamics of first-order digital phase-locked loops with frequency-modulated input
No full textIEEE International Symposium on Circuits and Systems (ISCAS), Seattle, USA, 18-21 May 2008Inherent to digital phase-locked loops is frequency quantization in the number-controlled oscillator which prevents the loop from locking exactly onto its reference signal and introduces unwanted phase jitter. This paper investigates the effect of frequency quantization in a first-order loop with a frequency-modulated input signal. Using tools of nonlinear dynamics, we show that, depending on the modulation amplitude, trajectories in the phase space eventually fall into either an invariant region or a trapping region, the boundaries of which give useful bounds on the steady-state phase jitter excursion. We also derive a sufficient condition for the maximum modulation amplitude to prevent loop cycle slipping.Science Foundation Irelandke, ab, co li - TS 17.04.1
Frequency quantization in first-order digital phase-locked loops with frequency-modulated input
No full textPresented at the International Workshop on Nonlinear Maps and their Applications (NOMA '07), INSA, Toulouse, December 13-14, 2007Frequency granularity in a digital phase-locked loop arises from quantization in the number-controlled oscillator which prevents
the loop from locking exactly onto its reference signal and introduces unwanted phase jitter. Based on a nonlinear analysis of trajectories in the phase space, we have recently investigated the effect of frequency
quantization in a first-order loop with a frequency-modulated input signal and have derived useful bounds on the steady-state phase jitter excursion. In this paper, we continue that work and derive the maximum modulation amplitude such that loop cycle slipping is avoided. We also examine in
detail the loop behavior in acquiring phase-lock.Science Foundation Irelandke, ab, co - TS 16.04.1
Homomorphism to R generated by abstract length functions: a dynamical construction
No full textErschler and Karlsson in [5] construct a homomorphism of a finitely generated group G to R using a random walk approach. Central to their construction were the word
length and a well behaved measure on G. In this note we define a class of abstract length functions and prove that Erschler and Karlsson construction can also be applied to this class.info:eu-repo/semantics/acceptedVersio
Discontinuous piecewise-linear discrete-time dynamics - maps with gaps in electronic sysems
No full textMany important electronic systems are modelled by discrete-time equations with nonlinearities that are discontinuous and piecewise-linear, often arising as a result of quantization. Approximations based on linearization – the standard engineering response to nonlinearity – are often quite unhelpful in these systems, because of the form of the nonlinearity. Certain methods and results have been developed over a number of years for the analysis of discontinuous piecewise-linear discrete-time dynamics. The aim of this tutorial paper is to review that body of knowledge, and to show how it can be applied to representative electronic systems.Science Foundation Irelan
Homomorphism to R generated by abstract length functions: a dynamical construction
No full textErschler and Karlsson in [5] construct a homomorphism of a finitely generated group G to R using a random walk approach. Central to their construction were the word
length and a well behaved measure on G. In this note we define a class of abstract length functions and prove that Erschler and Karlsson construction can also be applied to this class.info:eu-repo/semantics/acceptedVersio
Limit cycles in a digitally controlled buck converter
No full textEuropean Conference on Circuit Theory and Design (ECCTD), Linkoping, Sweden, 29-31 Aug. 2011We describe the mathematical model of a digitally controlled buck converter. This model is an autonomous discrete-time
discontinuous piecewise-linear dynamical system in three dimensions. Investigating this system, we find its equilibrium
points, describe the shape and size of possible limit cycles (i.e. stable periodic motions), and derive conditions for their existence and non-existence.Irish Research Council for Science, Engineering and Technologyti, ke, ab, li - TS 26.04.1
The Atlantic Philanthropies – a study of the enactment of philanthrocapitalism in Ireland
No full textThis research is concerned with the contemporary manifestation of philanthropy known as philanthrocapitalism. Characteristics of this model include the application of business language and methods to philanthropic giving and the assumption that government alone can no longer solve social issues. Of central concern to this study is the argument that the rise of philanthrocapitalism is undermining democracy, whereby certain philanthropic organisations have ‘taken on the role of the state – essentially setting and implementing policy through their independent funding choices’ (Eikenberry, 2006a: 588-9).
Irish philanthropic giving operates at a comparatively lower level to other European countries. To date there has been little research on the operation of foundations within the model of philanthrocapitalism in Ireland. One foundation, which adopted this approach, The Atlantic Philanthropies (AP), disbursed $1.3 billion in funding to Irish organisations over a period of three decades. The enactment of a philanthrocapitalist model of giving by AP, in its operating characteristics and its use of discourses, is the focus of this thesis.
Selected texts written by AP about its funding for prevention and early intervention approaches to children’s services forms the empirical research conducted as part of this study. An analysis of the discourses used in these texts identifies children and parent’s individual behaviour as problematic and this is the cause and result of wider social problems. Previous responses to the identified problems, by other actors, are framed as insufficient and the support of philanthropy (i.e. AP) is required. In its self-representation of its own role, AP adopts the triple role of helper-investor-governor. As a governor, AP exerts philanthropic governing capacity by shaping not only their own but the Irish government’s response to these identified problems
Statistical analysis of first-order bang-bang phase-locked loops using sign-dependent random-walk theory
No full textBang-bang phase-locked loops (BBPLLs) are inherently nonlinear due to the hard nonlinearity introduced by the binary phase detector (BPD). This paper provides an exact
statistical analysis of the steady-state timing jitter in a first order BBPLL when the reference clock is subject to accumulative
jitter. By elaborating on the analogy of viewing a first-order BBPLL as a single-integration delta modulator (DM) in the
phase domain, we are able to relate hunting jitter and slew-rate limiting in a BBPLL to granular noise and slope overload in a DM. The stochastic timing-jitter behavior is modeled as a sign-dependent random walk, for which we obtain the asymptotic characteristic function and analytical expressions for the first four cumulants. These expressions are applied to the BBPLL to
statistically analyze the static timing offset and the RMS timing jitter, including the effect of a frequency offset. The analysis shows that the RMS timing jitter is constant for small RMS clock jitter and grows quadratically with large RMS clock jitter, and that there exists an optimal bang-bang phase step for minimum RMS timing jitter. Computing the kurtosis reveals the effect of the BPD nonlinearity: the timing jitter is largely non-Gaussian.Science Foundation Irelandke, ab, li - TS 17.04.1
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