16 research outputs found
Analisi e progettazione di sistemi di alimentazione a basso rumore e interfacce analogiche integrate per applicazioni di fotorivelazione basati su fotomoltiplicatori al Silicio
No full textThis thesis focuses on the development of a low-noise power supply and an integrated analog interface for photodetection applications that involve Silicon Photomultipliers (SiPMs). SiPMs are modern solid-state photon sensors offering exceptional sensitivity and timing resolution, making them suitable for applications ranging from high-energy and nuclear physics experiments to high-sensitivity imaging.
For nuclear physics experiment, such as the dark matter detection in DarkSide-20k, a key is the design of a modular Voltage Supply Unit (VSU) for SiPM tiles with particularly low output noise. This is crucial for such an application, since the switching spikes can interfere with proper operation of the front-end electronics, mimic the photon detection behavior. The design of the VSU incorporates a flyback DC-DC converter and a linear regulator with multiple noise suppression techniques known in the literature. Measurements demonstrate the validity of the designed VSU, achieving noise levels below 1 mV for both peak-to-peak and RMS over a wide frequency range, exceeding the requirements for stable SiPM operation.
In the field of high-sensitivity cameras, SiPMs offer a fashionable alternative to common CMOS sensors. However, integration of the front-end electronics as in the digital SiPMs results in extremely high costs and difficulty of tuning and integration between the two elements. The ATARI project aims to develop an active carrier that integrates the front-end electronics, to be attached to the SiPMs through modern 3D-bonding techniques. In this context, an analog front-end for SiPM to be used as pixel-channel in ATARI has been designed. The interface is able to retrieve photon time and charge information provided by the SiPM, with a very low-impedance input Transimpedance Amplifier (TIA). This shows a linear response up to 30 detected photons, with an output of approximately 50 mV per photoelectron. The charge integrator exhibits enhanced sensitivity for low photon counts, thanks to an integrated non-linear capacitance. The Time-to-Digital Converter (TDC) achieves a time resolution of 5 ns if using a 20 MHz clock.
This research contributes to the advancement of SiPM technology, presenting solutions for low-noise bias voltage and the design of integrated SiPM front-end
IoT Battery-Less System for Plant Health Monitoring
No full textIn this work, we introduce an innovative battery-less Internet of Things (IoT) device designed specifically for the purpose of monitoring plant health. This system operates by gathering energy directly from the soil where the plant is rooted, employing a combination of the electrode potential principle and a cutting-edge maximum power point tracking algorithm, optimizing energy harvesting and ensuring that the system operates at peak efficiency. The harvested energy is efficiently stored within a supercapacitor, which subsequently serves as the primary power source for a highly energy-efficient System on a Chip (SoC). This SoC, in turn, is responsible for collecting and transmitting data related to light conditions and soil humidity. The data is transmitted via Bluetooth Low-Energy (BLE) technology, making it accessible for remote monitoring and analysis. Initial results from our research showcase the remarkable feasibility of the proposed system. We have successfully demonstrated its capability to extract energy from the environment, as evidenced by a fully functional prototype that relies solely on energy harvested through this method. A 330 μF capacitor has been charged in less than 3 min for the initial power-on of the whole system and less than 20 s after the initial startup, providing a 3 mA current to a standard LED for about 300 ms
A Novel Low-Power Differential Input Current Summing Second-Generation Voltage Conveyor
No full textThis paper presents a novel transistor-level design of a modified second-generation voltage conveyor (VCII), which incorporates two differential current inputs (Y+ and Y−) and gives a voltage output at terminal X that mirrors the sum of these currents. The circuit operation is based on current mirrors that maintain the X terminal in a stable “quiescent” state when no differential current is applied at Y+ and Y−. When a current flows into one of the two inputs, the sum is mirrored into X, providing a summed current measurement. This design, developed in a standard 0.35 μm CMOS transistors technology, ensures circuit high accuracy and robustness. The low power consumption of 24.6 μW makes it well-suited for portable biomedical applications as in environmental fields
Control Circuits for Adjustable Digitally Programmed DC Power Supplies
No full textThis paper presents and compare two methods for digital output programming and regulation of Switched Mode Power Supplies. One method is based on shunt regulator TL431 emulation, while the other uses injected current into the reference resistor divider. Both methods are tested on LM3481-EVM commercial module and have shown good linearity and satisfactory control performances on output voltage regulation. Finally, control accuracy of the two methods is discussed
Resistorless Current-Mode Schmitt Trigger for Single-Event Detection in Photomultipliers Front-Ends
No full textThis work proposes an integrated current-mode non-inverting Schmitt Trigger in a 150nm CMOS technology, without any feedback passive element, for photomultipliers single-event detection. The proposed device is triggered by a current input signal and provides an output voltage that is suitable for interfacing with digital systems. The small currents associated with a reduced number of photoelectrons require a high transimpedance gain and a narrow hysteresis width, making conventional approaches impractical. The proposed device shows a current threshold value to trigger the system, offering a high detection capability also with small currents. In addition, it makes the trigger hysteresis width less sensitive to supply variations. The proposed circuit has great design flexibility, also allowing user to tune the threshold currents using bias voltage reference. The proposed device properly operates under a power supply voltage 1.8 V to 3.3 V. Static power consumption is 10 μW, with a propagation delay of 25 ns and a total detection delay of 34 ns, driving a 3 pF load capacitance
High-Voltage Source for SiPM Biasing with Enhanced Noise Performances
No full textThis work introduces an improved high-voltage source designed to enhance noise performance when biasing Silicon Photomultipliers (SiPMs). The system is based on a flyback regulator that adopts multiple noise-reduction methods to suppress the switching spikes generated from the DC-DC converter as an alternative to the Cockroft-Walton multiplier. Noise reduction methods are presented, and design choices are explained. A linear output regulation is included to dimmer the output and select the required SiPM breakdown voltage, and a Digital-to-Analog converter is used as a programmable reference. The proposed voltage source has been tested up to 200 V and 2 mA current load, reaching a peak-to-peak AC noise lower than 16 mV and a total RMS noise value lower than 5 mV. Performances are compared with a commercial source meter, used in several experiments as bias voltage source, showing better results
CMOS Adaptive Biased Second Generation Voltage Conveyor
No full textIn this paper, a new second generation voltage conveyor (VCII) topology with adaptive bias is presented. For the first time, adaptive bias has been exploited in a CMOS VCII circuit, with the goal of reducing power consumption without sacrificing transient performance, in order to design an active building block suitable for very low power sensor interface applications. Dynamic bias is achieved by means of a circuit capable of both detecting the difference between the input voltage at voltage input terminal and the voltage at output terminal, producing an additional bias current proportional to this difference. It is important to note that the same circuit can also sense an increase of the input current at the current-input node, as the current variation produces a voltage change at voltage input terminal. The new topology has been designed in 0.35 μm AMS technology with a±0.9 V supply voltage, and Spice simulations were performed to evaluate performance in terms of slew-rate and power consumption. The same VCII topology, but without dynamic biasing, was also considered for comparison purposes: simulation results showed that the proposed topology is able to guarantee a reduction of more than 2 orders of magnitude in power consumption, with only 3 times worsening of the slew-rate
Evaluating the Response of Hydrological Stress Indices Using the CHyM Model over a Wide Area in Central Italy
No full textCentral Italy is characterized by complex orography. The territorial response to heavy precipitation may activate different processes in terms of hydrogeological hazards. Floods, flash floods, and wet mass movements are the main ground effects triggered by heavy or persistent rainfall. The main aim of this work is to present a unique tool that is based on a distributed hydrological model, able to predict different rainfall-induced phenomena, and essential for the civil protection early warning activity. The Cetemps Hydrological Model is applied to the detection of hydrologically stressed areas over a spatial domain covering the central part of Italy during a weather event that occurred in 2014. The validation of three hydrological stress indices is proposed over a geographical area of approximately 64,500 km2 that includes catchments of varying size and physiography. The indices were used to identify areas subject to floods, flash floods, or landslides. Main results showed very high accuracies (~90%) for all proposed indices, with flood false alarms growing downstream to larger basins, but very close to zero in most cases. The three indices can give complementary information about the predominant phenomenon and are able to distinguish fluvial floods from pluvial floods. Nevertheless, the results were influenced by the presence of artificial reservoirs that regulated flood wave propagation, therefore, indices timing slightly worsen downstream in larger basins
Realization of an Electronically Tunable Resistor-Less Floating Inductance Simulator Using VCII
No full textIn this paper, a new implementation of an electronically tunable resistor-less floating inductance simulator using a second-generation voltage conveyor (VCII) is presented. The proposed circuit is resistor-free (benefiting from the intrinsic resistors at the Y terminals of the employed VCIIs) and composed of three VCIIs and a single grounded capacitor. Using a control current (Icon), the value of impedance at the Y terminal of the VCII is varied, whereby the value of the simulated inductance is tuned. The proposed circuit is designed at a transistor level using 0.18 µm TSMC CMOS parameters and ±0.9 V supply voltage. PSpice simulations are carried out to confirm the effectiveness of the proposed circuit. For a range of Icon from 0 µA to 50 µA, the value of the simulated L can be varied from −576 µH to −324 µH and from +316 µH to +576 µH for negative and positive simulators, respectively, in the frequency range of 100 kHz–3 MHz. Favorably, the value of the series resistance remains below 76 Ω. Simulation results show an error value below 4.8% and power consumption variation is from 1.64 mW to 1.92 mW. Moreover, application of the proposed circuit as a standard band-pass RLC filter is also included
A LoRaWAN Multi-Technological Architecture for Construction Site Monitoring
No full textIt is necessary to ensure safety in terms of health and accidents through the real-time monitoring of the construction site environment and workers. This problem has become of great importance due to the economic and social implications. Therefore, a sensor-based approach has been found to be beneficial in Building Information Modeling (BIM). Wireless Sensor Network (WSN) technologies are well-suited for the deployment of monitoring systems. A suitable technical solution for node communication in a WSN is Long Range (LoRa) modulation technology. In this study, an autonomous LoRa-based system for the monitoring of a construction site in Lungro, Calabria, Italy, is presented. The spatial monitoring of working personnel is achieved by employing a tracker device with an Inertial Measurement Unit (IMU) and a Global Positioning System (GPS) device. Accesses of personnel and gear to the site are registered using Radio Frequency Identification (RFID) tags equipped with protective gear. Fixed-position solar-powered sensor nodes are also employed for structural monitoring, i.e., movement sensors are used to monitor the variation of scaffolding, building structures, and under-work housing inclinations. Long Range Wide Area Network (LoRaWAN) gateways interface with the nodes and the internet for data exchange, enabling an Internet of Things (IoT) paradigm for the monitoring solution. A comprehensive overview of the workers and structural nodes, along with the RFID access management system and LoRaWAN gateway features, is provided in this article. A description of the web interface is also reported
