378 research outputs found
MDL Based Model Selection for Relevance Vector Regression
Relevance Vector regression is a form of Support Vector regression, recently proposed by M.E.Tipping, which allows a sparse representation of the data. The Bayesian learning algorithm proposed by the author leaves the partially open question of how to automatically choose the optimal model. In this paper we describe a model selection criterion inspired by the Minimum Description Length (MDL) principle. We show that our proposal is effective in finding the optimal kernel parameter both on an artificial dataset and a real-world application.Artificial Neural Networks --- ICANN 2002info:eu-repo/semantics/publishe
Smart Adaptive Systems: State of the Art and Future Directions of Research
This talk outIines sorne ofthe ideas and discussions carried on by RTD-SAS researchers during the first year of the EUNITE network. The focus is mainly on theoretical aspects of Smart Adaptive Systems that will serve as the basis for the creation of successful applications. Smart Adaptive Systems are of paramount importance in many application fields, where a changing environment is a common issue, but also extremely appealing, and equally challenging, from a theoretical point of view. Here, a first attempt to highlight sorne of the current knowledge on this field and, hopefully, to give a guideline for future research directions is reported
Nature Inspiration for Support Vector Machines
We propose in this paper a new kernel, suited for Support
Vector Machines learning, which is inspired from the biological world. The kernel is based on Gabor filters that are a good model for the response of the cells in the primary visual cortex and have been shown to be very effective in processing natural images. Furthermore, we build a link between energy-efficiency, which is a driving force in biological processing systems, and good generalization ability of learning machines. This connection can be the starting point for developing new kernel-based
learning algorithms
Learning hardware friendly classifiers through algorithmic risk minimization
Conventional Machine Learning (ML) algorithms do not contemplate computational constraints when learning models: when targeting their implementation on embedded devices, restrictions are related to, for example, limited depth of the arithmetic unit, memory availability, or battery capacity. We propose a new learning framework, i.e. Algorithmic Risk Minimization (ARM), which relies on the notion of stability of a learning algorithm, and includes computational constraints during the learning process. ARM allows to train resource-sparing models and enables to efficiently implement the next generation of ML methods for smart embedded systems. Advantages are shown on a case study conducted in the framework of Human Activity Recognition on Smartphones, on which we show that effective and computationally non-intensive models can be trained from data and implemented on the destination devices
Neural network learning for analog VLSI implementations of support vector machines: a survey
In the last few years several kinds of recurrent neural networks (RNNs) have been proposed for solving linear and nonlinear optimization problems. In this paper, we provide a survey of RNNs
that can be used to solve both the constrained quadratic optimization problem related to support vector machine (SVM) learning, and the SVM model selection by automatic hyperparameter tuning. The appeal of this approach is the possibility of implementing such networks on analog VLSI systems with relative easiness. We review several proposals appeared so far in the literature and test their behavior when applied to solve a telecommunication application, where a special purpose adaptive hardware is of great interest
The Effects of Quantization on Support Vector Machines with Gaussian Kernel
We apply here a probabilistic method to predict the
effect of quantizing the parameters of a Support Vector Machine.
Thank to the particular structure of the SVM, the dependency
of the output from the quantization noise can be predicted with
good accuracy, and a simple closed–form formula can be derived,
without imposing any hard–to–verify assumptio
Perspectives on dedicated hardware implementations
Algorithms, applications and hardware implementations of
neural networks are not investigated in close connection. Researchers working in the development of dedicated hardware implementations develop simplified versions of otherwise complex neural algorithms or develop dedicated algorithms: usually these algorithms have not been horoughly tested on real-world applications. At the same time, many theoretically sound algorithms are not feasible in dedicated hardware, therefore limiting their success only to applications where a software solution on a general-purpose system is feasible. The paper focuses on the issues related to the hardware implementation of neural algorithms and architectures and their successful application to real world-problems
Improved Neural Network for SVM Learning
The recurrent network of Xia et al. was proposed for solving
quadratic programming problems and was recently adapted to support
vector machine (SVM) learning by Tan et al.We show that this formulation contains some unnecessary circuit which, furthermore, can fail to provide the correct value of one of the SVM parameters and suggest how to avoid these drawbacks
European Symposium on Artificial Neural Networks 2001
Algorithms, applications and hardware implementations of
neural networks are not investigated in close connection. Researchers
working in the development of dedicated hardware implementations de-
velop simplied versions of otherwise complex neural algorithms or de-
velop dedicated algorithms: usually these algorithms have not been thor-
oughly tested on real-world applications. At the same time, many theo-
retically sound algorithms are not feasible in dedicated hardware, there-
fore limiting their success only to applications where a software solution
on a general-purpose system is feasible. The paper focuses on the is-
sues related to the hardware implementation of neural algorithms and
architectures and their successful application to real world-problems
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