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    Ring oscillators analysis for security purposes in Spartan-6 FPGAs

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    Nowadays, many digital applications domains are arising and posing new design issued and challenges related to the security and trustworthiness. Physically Unclonable Functions (PUFs) are emergent and promising solutions in providing some security mechanisms, such as key storing and generation, challenge/response provider, and protection of Intellectual Properties (IPs). As a huge range of embedded applications is deployed on Field Programmable Gate Arrays (FPGAs) devices, most widespread PUFs’ architectures are based on Ring Oscillators (ROs), as they are suitable for an implementation on programmable devices. ROPUF exploits comparisons of measured frequencies, obtained by picking a RO pair, aiming to generate bit responses. In this paper, we present a study of the frequencies characteristics, implementing ROs on a significant number of Xilinx Spartan 6 devices, in order to statistically characterize the oscillations, evaluating the impact of some external uncontrolled parameters that can disturb and alter their original qualities, useful to validate the effectiveness of the ROPUF

    Implementation and analysis of ring oscillator circuits on xilinx FPGAs

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    This chapter gives an extensive description of ring oscillators (ROs) implemented on Xilinx FPGA technology, aiming at providing a basic primitive to define physically unclonable functions based on ROs and illustrating, through detailed analyses, frequency distributions. As for the implementation, we detail in the chapter any step required to implement a RO and measure its frequency. In particular, we illustrate how to accomplish such operation by means of Xilinx ChipScope. Furthermore, we show main design parameters, such as the number of stages, of the RO and how they impact on the frequency characterization. At the end, we provide other characterization by means of dynamic parameters variations, such as temperature and aging effects
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