1,721,076 research outputs found
Testing high resolution ΣΔ ADC's by using the quantizer input as test access
No full textA new solution to improve the testability of high resolution SD Analogue to Digital Converters (SD ADC’s) using the quantizer input as
test node is described. The theoretical basis for the technique is discussed and results from high level simulations for a 16 bit, fourth order,
audio ADC are presented. The analysis demonstrates the potential to reduce the computational effort associated with test response analysis
versus conventional techniques. If only SNR, THD and gain of the SD ADC are evaluated with the new proposed method the test time is
already reduced by 20%
FPGA-based test strategy for high resolution ADC: analysis, optimization and experimental results
No full textAn Embeddable Object Manipulation Framework for Assistive Robotics
No full textRecently, robots’ employment in the ambient assisted living framework is rapidly growing. Most of the employed robots fall within the category of social robots, i.e., automata able to interact verbally with the user to be assisted, supporting caregivers in patient’s need comprehension. However, most of these, although equipped with arms for social interaction, lack manipulative abilities. In this context, the paper proposes an embeddable object manipulation framework, which consists of a set of low-complexity routines to expand functionalities on social robots, and specifically on Pepper by SoftBank Robotics, permitting its employment in assistive scenarios. Implemented routines exploit Pepper’s built-in RGB cameras to (i) identify the object to be grabbed, (ii) estimate its coordinate in the three-dimensional frame; (iii) plan the arm movement sequence, and (iv) grab the object for final recognition. The routine is designed to be fully automatic (no internet connection), preserving sensitive data stored in the robot's memory. Experimental results demonstrated a grabbing accuracy of ~ 87% for different shelf heights, demonstrating the employability of improved social robotics for daily-life assistance and ambulatorial contexts
Food Waste Prevention System to Improve Smart Homes Sustainability
No full textThe recent spread of smart homes is sparking corporates and research interest in residents’ needs with a particular focus on reduced energy consumption and less stressful daily life. As seen in the literature, to the food waste, one of the most pressing problems of today, has not been given special attention. In this scenario, in order to curb poor consumer behavior and improper food storage, the proposed work leverages the close cooperation of a Wireless Sensor Network (WSN) and an actuation system enriching smart homes of pervasive capabilities. The sensor network is constituted by a fleet of sensor nodes each of which monitors the microclimate of a particular food item. The microclimate data is used to compute a dynamic expiration date and to evaluate the need for intervention by the actuation system. This last consists in a robotic platform with an assistive purpose. When prompted to act, the robot starts a series of routines to bring the good and move it to a place with better preservation conditions
Floating body effects model for fault simulation of fully depleted CMOS/SOI circuits
No full textThe possibility to perform realistic fault simulations for Silicon-On-Insulator circuits is investigated. A simple but complete fault simulation model (fsm) for a technology specific effect is described. The effect considered known as kink effect is typical for partially depleted devices but can occur in the presence of a floating body or in the sub-threshold region even in fully depleted devices causing wrong performances. The model proposed here comprises of only a single additional transistor with a controlled body current. It is not a real physical transistor but just one to describe the electrical behaviour of the device when the critical kink-effect situation occurs and for this reason does not increase the simulation time. From the comparison with device characterization measurements on a 1 mum technology device a good matching with the fsm was foun
On-chip test for Mixed-signal ASICs using two-mode comparators with bias-programmable reference voltages
No full textA design-for-testability implementation for analogue functional blocks of mixed-signal ASICs is presented. For the analogue blocks direct access via an analogue input pin for the automated test equipment is required. To this end existing OpAmp or OTA stages of the respective analogue blocks are converted into simple clocked comparators. The resulting two-mode comparators are used to observe specific internal nodes of the functional block under test. Depending on the comparator mode, the observed test response evaluation can either be static and/or quasi-dynamic. At least two reference voltages are required each with two different levels determined by a hysteresis. All necessary reference voltages are generated on-chip in the central biasing cell of the ASIC. Due to this Design-for-Testability implementation, an on-chip test evaluation can be performed without the need to bring an analogue signal on- or off-chip. From simulation and measurement results of a feasibility study performed on a general purpose test circuit realised in 0.35 mum technology, the applicability was demonstrated. It showed that good fault coverages in the analogue functional blocks can be achieved. Estimations about the biasing programming indicated that this technique is in particular suitable for mixed-signal ASICs larger than 15 mm(2) with a typical total power consumption of more than 50 mW typical for high voltage application
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