2 research outputs found
Auto-ranging DSM-ADC and LED Communication for Whole-life Neural Recording Module
No full textThis paper focused on establishing a closed-loop stimulation environment capable of accommodating multiple experimental animals. The key requirement for closed-loop stimulation is the ability to measure neural signals within the stimulation environment. To achieve simultaneous measurement of stimulation artifacts in the range of tens of mV and neural signals in the range of hundreds of V, a recording system with a large dynamic range is essential to prevent saturation caused by the high-intensity stimulation artifacts. Furthermore, to transmit the acquired data externally, down-sampling is essential to reduce power consumption. In this work, delta-sigma (DS) modulation and digital prediction techniques are used to ensure a high dynamic range and prevent saturation in the recording stage. Additionally, to facilitate the simultaneous transmission of data from multiple animals without signal degradation, an internal cascaded integrator-comb (CIC) filter is utilized to encode the down-sampled data. The proposed approach enables the creation of a robust closed-loop stimulation recording system capable of handling multiple subjects while maintaining data integrity. We present 8 channel neural recording chip with a 65-nm CMOS process and the entire chip area is 1 mm2. Two signals were transmitted and received at a distance of 10 cm with a 1 Mbit data rate without an error.
DiTTO: A Distance Adaptive Over 100-mW Wireless Power Transfer System With 1.695-Mb/s Uplink Telemetry and a Shared Inductor Two-Output Regulating Rectification
No full textThis article presents a wireless power transfer (WPT) system that incorporates a seamless uplink data telemetry and a simultaneous shared inductor dual-output (SIDO) regulating rectification (RR) under distance variation over a single WPT link. The proposed double charging keying (DCK) uplink data modulation method assisted by a dynamic zoom control breaks the trade-off between power delivery to the load (PDL) and uplink data such that the high data-rate uplink data telemetry no longer limits the amount of PDLs. Furthermore, DCK alleviates the design difficulty in simultaneous uplink data telemetry and RR. The dynamic ZOOM-based digital control algorithm is employed to ensure reliable uplink data telemetry and rapid transient response of SIDO-RR with two Delta Sigma -loops under distance variations. This work achieves 1.695-Mb/s uplink data rate while delivering up to 108 mW to two independent loads over 10-42-mm single-link distance. The chip fabricated in standard 65-nm CMOS occupies 0.2-mm(2 )active area and its performance is validated through in vivo experiments.
