305,465 research outputs found
Stochastic synaptic plasticity in deterministic aVLSI networks of spiking neurons
Full text linkChicca E, Fusi S. Stochastic synaptic plasticity in deterministic aVLSI networks of spiking neurons. In: Rattay F, ed. Proceedings of the World Congress on Neuroinformatics. Vienna: ARGESIM/ASIM Verlag; 2001: 468-477.Stochastic learning solves the stability-plasticity problem (Fusi et al., 2000a)
but raises new issues related to the generation of the proper noise driving
the synaptic dynamics. Here we show that a simple, fully deterministic,
spike-driven synaptic device can make use of the network generated vari-
ability in the neuronal activity to drive the required stochastic mechanism.
Randomness emerges naturally from the interaction of deterministic neu-
rons, and no extra source of noise is needed. Learning and forgetting
rates of the network can be easily controlled by changing the statistics of
the spike trains without changing any inherent parameter of the synaptic
dynamics
Neuromorphic Engineering: From Neural Systems to Brain-Like Engineered Systems
Full text linkMorabito FC, Andreou AG, Chicca E. Neuromorphic Engineering: From Neural Systems to Brain-Like Engineered Systems. Neural Networks. 2013;45:1-3
Frontino, De aquae ductu urbis Romae, Introduzione, testo critico, traduzione e commento a cura di Fanny Del Chicca
No full textNuova edizione critica del De aquae ductu di Frontino, preceduta da una Introduzione e seguita da un commento filologico, che tratta approfonditamente anche gli aspetti storici, tecnico-idraulici, archeologici e topografici, istituzionali e giuridici in relazione all'amministrazione acquaria dell'antica Roma
A systematic method for configuring VLSI networks of spiking neurons
Full text linkNeftci E, Chicca E, Indiveri G, Douglas RJ. A systematic method for configuring VLSI networks of spiking neurons. Neural Computation. 2011;23(10):2457-2497.An increasing number of research groups are developing custom hybrid analog/digital very large scale integration (VLSI) chips and systems that implement hundreds to thousands of spiking neurons with biophysically realistic dynamics, with the intention of emulating brainlike real-world behavior in hardware and robotic systems rather than simply simulating their performance on general-purpose digital computers. Although the electronic engineering aspects of these emulation systems is proceeding well, progress toward the actual emulation of brainlike tasks is restricted by the lack of suitable high-level configuration methods of the kind that have already been developed over many decades for simulations on general-purpose computers. The key difficulty is that the dynamics of the CMOS electronic analogs are determined by transistor biases that do not map simply to the parameter types and values used in typical abstract mathematical models of neurons and their networks. Here we provide a general method for resolving this difficulty. We describe a parameter mapping technique that permits an automatic configuration of VLSI neural networks so that their electronic emulation conforms to a higher-level neuronal simulation. We show that the neurons configured by our method exhibit spike timing statistics and temporal dynamics that are the same as those observed in the software simulated neurons and, in particular, that the key parameters of recurrent VLSI neural networks (e. g., implementing soft winner-take-all) can be precisely tuned. The proposed method permits a seamless integration between software simulations with hardware emulations and intertranslatability between the parameters of abstract neuronal models and their emulation counterparts. Most important, our method offers a route toward a high-level task configuration language for neuromorphic VLSI systems
An event-based VLSI network of integrate-and-fire neurons
Full text linkChicca E, Indiveri G, Douglas RJ. An event-based VLSI network of integrate-and-fire neurons. Presented at the Proceedings of the 2004 International Symposium on Circuits and Systems (ISCAS).The growing interest in pulse-based neural networks is encouraging the development of hardware implementations of massively parallel, distributed networks of integrate-and-fire (I&F) neurons. We have developed a mixed-mode (analog/digital) VLSI device that comprises a reconfigurable network of I&F neurons and adaptive synapses. The synapses receive input spikes and the neurons transmit output spikes (events) using an asynchronous address-event representation (AER). We describe the network architecture, present experimental data demonstrating the characteristics of the single elements on the chip, and show that a competitive network configuration has winner-take-all (WTA) behaviour and produces spike synchronization
A VLSI neuromorphic device for implementing spike-based neural networks
Full text linkIndiveri G, Chicca E. A VLSI neuromorphic device for implementing spike-based neural networks. Presented at the Proceedings of the 21st Italian Workshop on Neural Nets (WIRN).We present a neuromorphic VLSI device which comprises hybrid analog/digital circuits for implementing networks of spiking neurons. Each neuron integrates input currents from a row of multiple analog synaptic circuit. The synapses integrate incoming spikes, and produce output currents which have temporal dynamics analogous to those of biological post synaptic currents. The VLSI device can be used to implement real-time models of cortical networks, as well as real-time learning and classification tasks. We describe the chip architecture and the analog circuits used to implement the neurons and synapses. We describe the functionality of these circuits and present experimental results demonstrating the network level functionality
Tissue location of resistance in apple to the rosy apple aphid established by electrical penetration graphs
Full text linkA study of the constitutive resistance of the apple cultivar Florina, Malus domestica Borkh. (Rosaceae), to the rosy apple aphid, Dysaphis plantaginea (Passerini) (Homoptera Aphididae), was performed for the first time by the electrical penetration graph (DC-EPG) system, using the susceptible apple cultivar Smoothe as control. All experiments were conducted with apterous adult virginoparae. The results showed a constitutive resistance in Florina due to a much longer period before the first probe reflecting surface factors. Some weak indications were found for pre-phloem resistance and initiating phloem access was not affected as inferred from equal time to show phloem salivation. However, the complete absence of phloem ingestion indicates a major resistance factor in the phloem sieve elements, most likely in the sieve element sap. Surface factors could have affected tissue related variables and this should be studied further. Anyhow, the strong constitutive resistance in Florina, either on the surface alone or in the phloem as well, effectively prevented reliable experiments on induced resistance, previously detected by molecular methods
Characterizing the firing properties of an adaptive analog VLSI neuron
Full text linkBen Dayan Rubin D, Chicca E, Indiveri G. Characterizing the firing properties of an adaptive analog VLSI neuron. Biologically Inspired Approaches to Advanced Information Technology. 2004;3141:189-200.We describe the response properties of a compact, low power, analog circuit that implements a model of a leaky-Integrate & Fire (I&F) neuron, with spike-frequency adaptation, refractory period and voltage threshold modulation properties. We investigate the statistics of the circuit's output response by modulating its operating parameters, like refractory period and adaptation level and by changing the statistics of the input current. The results show a clear match with theoretical prediction and neurophysiological data in a given range of the parameter space. This analysis defines the chip's parameter working range and predicts its behavior in case of integration into large massively parallel very-large-scale-integration (VLSI) networks
A VLSI recurrent network of integrate-and-fire neurons connected by plastic synapses with long-term memory
Full text linkChicca E, Badoni D, Dante V, et al. A VLSI recurrent network of integrate-and-fire neurons connected by plastic synapses with long-term memory. IEEE Transactions on Neural Networks. 2003;14(5):1297-1307.Electronic neuromorphic devices with on-chip, on-line learning should be able to modify quickly the synaptic couplings' to acquire information about new patterns to be stored (synaptic plasticity) and, at the same time, preserve this information on very long time scales (synaptic stability). Here, we illustrate the electronic implementation of a simple solution to this stability-plasticity problem, recently proposed and studied in various contexts. It is based on the observation that reducing the analog depth of the synapses to the extreme (bistable synapses) does not necessarily disrupt the performance of the device as an associative memory, provided that 1) the number of neurons is large enough; 2) the transitions between stable synaptic states are stochastic; and 3) learning is slow. The drastic reduction of the analog depth of the synaptic variable also makes this solution appealing from the point of view of electronic implementation and offers a simple methodological alternative to the technological solution based on floating gates. We describe the full custom analog very large-scale integration (VLSI) realization of a small network of integrate-and-fire neurons connected by bistable deterministic plastic synapses which can implement the idea of stochastic learning. In the absence of stimuli, the memory is preserved indefinitely. During the stimulation the synapse undergoes quick temporary changes through the activities of the pre- and postsynaptic neurons; those changes stochastically result in a long-term modification of the synaptic efficacy. The intentionally disordered pattern of connectivity allows the system to generate a randomness suited to drive the stochastic selection mechanism. We check by a suitable stimulation protocol that the stochastic synaptic plasticity produces the expected pattern of potentiation and depression in, the electronic network. The proposed implementation requires only 69 x 83 mum(2) for the neuron and 68 x 47 mum(2) for the synapse (using a 0.6 mum, three metals, CMOS technology) and, hence, it is particularly suitable for the integration, of a large number of plastic synapses on a single chip
Firing proprieties of an adaptive analog VLSI neuron
Full text linkBen Dayan Rubin D, Chicca E, Indiveri G. Firing proprieties of an adaptive analog VLSI neuron. Presented at the Proceedings of Bio-ADIT, Lausanne, Switzerland.We describe the response properties of a compact, low power, analog circuit that implements a model of a leaky I&F neuron, with spike-frequency adaptation, refractory period and voltage threshold modulation properties. We investigate the statistics of the circuit's output response by modulation its operating parameters, like refractory period and adaptation level and by changing the statistics of the input current. The results show a clear match with theoretical and neurophysiological data in a given range of the parameter space. This analysis defines the chip's parameter working range and predicts its behavior in case of integration into large massively parallel VLSI networks
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