1,720,995 research outputs found
A continuous-time S-D converter with offset calibration for biological application
No full textIn the present paper, a continuous time converter for biological application is presented. The implemented ASIC has been designed for reading piezo-resistive MEMS cantilever used as DNA detector. The readout channel consists of a first analog front-end circuit able to reduce possible input offset and electronic mismatch, followed by a continuous-time 9b first order S-D converter for digital conversion. Simulation results show a circuit accuracy on the measurement of resistance variation in the order of 10 ppm within a maximum range of 10%
Design and Characterization of a 5-Decade Range Integrated Resistive Gas Sensor Interface with 13-Bit A/D Converter
No full textA CMOS single-photon avalanche diode sensor for fluorescence lifetime imaging
No full textThis contribute describes the design and preliminary characterization of a 16x16-pixel array based on Single Photon Avalanche Diodes (SPADs), fabricated in a standard high-voltage 0.35μm CMOS technology, and aimed at the analysis of fluorescence phenomena. Each pixel integrates a SPAD combined with an active quenching circuit and a voltage comparator for the digital conversion of the avalanche event. The sensor features a minimum detectable photon density of 108 photons/cm2s, with a maximum dynamic range of over 120dB. Detection of fluorescence light has been demonstrated with a 160ps time resolution over a 100ns observation window
A Column Readout Channel for Infrared and Terahertz Bolometers with Direct Analog to Digital Conversion
No full textThis paper describes a readout channel suitable for infrared and terahertz bolometric sensors arrays where the signal integration is performed simultaneously with the analog-to-digital conversion in a columnwise architecture. By exploiting the need of an integrator both in conventional IR readout channels and incremental converters, the proposed circuit implements a 5-bit continuous-time incremental conversion during signal integration, then the same electronics is used to perform an additional 6-bit algorithmic conversion on the integrator residual voltage. A prototype of the channel has been fabricated in standard CMOS technology (0.35μm 2P4M) featuring 11-bit digital output at 7.12ksamples/s and occupying an area of 0.0301mm2 with a power consumption of only 90μW from a supply of 3.3V
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