1,720,962 research outputs found
Fast charging techniques and compact integrated implementations for electrochemical double layer capacitors in portable applications
No full textThe widespread increase in the range and types of portable electronic devices in the past decades has resulted in higher requirements for energy storage and conversion modules. Most of these devices use rechargeable batteries as energy storage elements. No matter what type of batteries are used (Ni-Cd, Ni-MH, Li-Ion, etc.) they all have one serious drawback in common, in terms of charging time. Electrochemical double layer capacitors (EDLCs) also known as ultracapacitors or supercapacitors seem to have overcome this disadvantage, at the cost of lower energy storage capacity.This work aims to explore the design of fast and compact integrated charging techniques for ultracapacitors using the AC mains network as the source. The main constraints that arise are the power dissipation on-chip and in the magnetic components due to the large amount of energy that has to be transferred in a very short time interval. Two other limitations come from the EDLC side due to the device parasitics and the widely varying voltages over the operational envelope. This will impose the need for a flexible control system providing high efficiency over the whole output voltage range.The structure of this thesis comprises five main parts: literature review, behavioural modelling of the control system (including matlab simulations); implementation of the device with discrete components; design of an analogue circuit implementation and design of a mixed signal circuit implementation. As ultracapacitors represent one of the newest solutions in the field of electrical energy storage there are very few designs for chargers from the mains network. Therefore the literature review will also examine the properties and the modelling of EDLCs, as well as the choice of converter topologies available and the characteristics of the magnetic devices required for the system. The behavioural model of the control module gives a preview of the system parameters, while the design chapter introduces a series of new control techniques. The simulations and measurements of the breadboard circuit come as a first confirmation of the design approach and make it a viable starting point for an IC implementation. The analogue IC design presents the integration of the algorithms in a medium-voltage process using the current mode approach, as a demonstrator for a fully monolithic high-voltage IC. Once the functionality of the system is demonstrated at IC level, the mixed-signal system aims to optimize the device and provide a broader flexibility for the system parameters and control algorithms
High-accuracy current memory in HV CMOS technology
No full textThis brief describes an improved current memorycircuit aimed at circumventing problems inherent in using a high-voltage double-diffused MOS (DMOS) with CMOS technology. In addition to dealing with the excessive output conductance of a simple cell with cascoding in the familiar way, the circuit addresses the significant drain–gate feedthrough seen in such technologies.A replica bias scheme ensures that the gm of the memory device remains substantially constant notwithstanding the signal current level variations, leading to improved control over charge injection errors. The topology may also be used in conventional small geometry CMOS technolog
An integrated ultracapacitor fast mains charger with combined power/current optimisation
No full textThis paper presents a novel integrated self-oscillating step-down converter for the fast charging of stacks of large ultracapacitors from a 230V AC mains source. The charger architecture controls both power and current to optimise the charge rate with respect to the limitations imposed by the mains source and the capacitors themselves. The circuit has been fabricated in a 0.35 µm bulk medium voltage CMOS, process
A Self-tuning resonant-inductive-link transmit driver using quadrature symmetric phase switched fractional capacitance
No full textInductive coupling for power transfer is increasingly popular in many applications such as RFID and wireless charging. While much recent work has focussed on receivers, less consideration has been given to the transmit function. High-Q antenna circuits are beneficial for several reasons. Activation of a link at a distance requires a large magnetic field from the transmitter, so for a given antenna current, lower driver voltages may be used, simplifying the driver and its power supplies, and improving overall efficiency. Further, the inherent filtering allows a high-efficiency switching driver to be used while reducing harmonics in the current. However, the consequent narrow bandwidth requires precise tuning to resonance. The excitation frequency may be varied in some applications, but this transfers the tuning problem to the receiver. Any transmit tuning circuitry must be linear with large voltages (from a few V to kV) and currents (mA to many A). A conventional technique is to use multiple external capacitors selected by large switches or even relays. The number of selectable elements needed depends on the Q factor, component tolerances, and environmental effects, with a typical system requiring 5 or more extra capacitors and associated HV switches (Fig. 22.1.1), plus extra IC pins, adding to system cost and volume
Continuous tuning of inductive link antennae with zero voltage switched fractional capacitance
No full textA 250W/30A fast charger for ultracapacitors with direct mains connection
No full textThis paper presents a fast and compact charger architecture for ultracapacitors with direct connection to 230V AC mains supply. The charger delivers a DC output current which allows compensation for inductive and other non-ideal behaviour in the EDLC at medium and high frequencies. The internal converter uses self oscillating control circuits which provide a variable switching frequency over a broad range. This allows the circuit to adapt to the variation of the output voltage (0-16.2V) and fluctuations of the mains network, thereby minimizing losses over the whole operating envelope
A CMOS MF energy harvesting and data demodulator receiver for wide area low duty cycle applications with 250 mV start-up voltage
No full textA low voltage start-up energy harvesting medium frequency receiver is presented, for use as the power and synchronisation part of a remote sensor node in a wide area industrial or agricultural application. The use of embedded low bandwidth network synchronisation data permits very low operational duty cycle without the need for real time clocks or wake up receivers at each node with their associated continuous power drain. The receiver consists of a rectifier, a power management unit and a phase-shift keying demodulator. The rectifier is optimised for low start-up and operating voltage rather than power efficiency. With standard MOS thresholds the rectifier can cold start with only 250 mV peak antenna input, and useful battery charging is delivered with 330 mV peak input. The QPSK demodulator consumes 1.27 μW with a supply voltage of 630 mV at a data rate of 1.6 kbps with 1 MHz carrier frequency. The IC is implemented in a standard threshold 0.18 μm CMOS technology, occupies 0.54 mm2 and can deliver 10.3 μW at 3 V to an external battery or capacitor
Adaptive tuning of large-signal resonant circuits using phase-switched fractional capacitance
No full textInductively coupled systems used in applications such as RFID and wireless power often require high Q factor resonant transmitters to maximize the magnetic field and achieve high overall efficiency. However, these are sensitive to environmental detuning as well as component tolerances. Existing methods for accurate tuning require search algorithms, usually requiring the suspension of normal operation in order to calibrate the resonant inductor-capacitor circuit, thus reducing power throughput and increasing system complexity. We describe here how zero-voltage switched fractional capacitance techniques may be used to achieve continuous and real-time adaptive tuning of large-signal resonant inductor-capacitor circuits. Minimal additional circuitry is required and tuning is maintained without disrupting normal operation. Many variants are possible for the implementation of the system, and some tradeoffs relating to the available tuning range and operating voltages are analyzed for two alternative topologies. Experimental results are presented for a 125-kHz demonstration system
28.4 A high-Q resonant inductive link transmit modulator/driver for enhanced power and FSK/PSK data transfer using adaptive-predictive phase-continuous switching fractional-capacitance tuning
No full textAs well as transferring power, inductively coupled systems such as RFID and wireless charging commonly require a downlink channel to transfer data to the receiving function, for simplicity usually using the same carrier frequency used for the power transfer. A high-Q resonant transmitter coil is highly desirable to create the strong magnetic field required fora practical operating range. However, this not only raises major problems with sensitivity to tolerances and environmental factors, but also seriously restricts the available bandwidth and hence downlink data-rate. Amplitude Shift or On-Off Keying (ASK/OOK) are commonly used to allow simple demodulation, but in addition to the 0 factor restricting the data-rate, the average power transfer will be reduced by around 50%. Frequency Shift Keying (FSK) or Phase Shift Keying (PSK) are attractive inasmuch as the nominally constant envelope provides a potentially higher power throughput, but the data-rate issue with a high-Q transmitter still remains. This is obvious for FSK, where by definition operation cannot be maintained away from the transmitter antenna's resonance frequency. Less obviously, for PSK applied to a nominally constant frequency carrier, the stored energy in the transmit tuned circuit will slow the phase transitions making demodulation more difficult; for binary PSK the amplitude will also drop significantly at each symbol transition. Note that the receiver 0 factor is usually lower to avoid the need for active tuning in a micropower circuit.</p
A self-tuning resonant-inductive-link transmit driver using quadrature symmetric delay trimmable phase-switched fractional capacitance
No full textThe efficiency of inductively coupled power transfer systems is increased when high-Q inductor-capacitor circuits are used, maximizing the magnetic field strength at the transmitter for a given drive amplitude. Such circuits require precise tuning to compensate environmental effects and component tolerances, which modify the resonant frequency. A single zero-voltage-switched fractional capacitance may be used to accurately tune the circuit to resonance, reducing implementation costs compared with classical tuning techniques. However, integration into a chip presents challenges, which must be addressed, such as operating with large voltage excursions and compensating for high-voltage driver delays. We describe here the operation of a self-tuning LC resonant circuit driver using a symmetrically switched fractional capacitance. An architecture for a fully integrated system for operation at 75 kHz-2.6 MHz is presented. Implemented in a 0.18-μm 1.8-50 V CMOS/laterally diffused MOSFET(LDMOS) technology, the integrated circuit uses high-voltage interfaces for capacitance switching and sampling inputs and includes digital phase trimming to compensate propagation delays in large driver devices. Correct operation of the self-tuning functionality is verified across the available frequency range, with results presented for static and dynamic tuning responses.</p
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