1,721,102 research outputs found

    Hardware-in-the-Loop Implementation of ROMAtrix, a Smart Transformer for Future Power Grids

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    The evolution of power generation brings about extensive changes in other parts of the grid, especially in the transmission and distribution components. Within the scope of the Internet of Energy (IoE), electric power flows more flexibly between different parts of the grid. DC power will play an essential role in IoE. Decentralized photovoltaic panels, energy storage, electric vehicle charging stations, and data centers are some of the significant components of future grids dealing with DC power. As a result, power transformers must be appropriately modified to manage power among the different parts of the grid. A power electronic transformer (PET), also known as a solid-state transformer (SST) or smart transformer (ST), is a solution enabling a power grid to deal with this growing complexity. ROMAtrix, as a matrix-converter-based ST, is a developing project targeting future power grids. ROMAtrix realizes the application of a medium voltage (MV) transformer using commercially available power electronic semiconductors. Due to the distinctive features of ROMAtrix and a high number of switches, the implementation of the control system using a single control board is highly demanding. This paper aims to illustrate the implementation, on a field-programmable gate array (FPGA), of pulse width modulation (SVMPWM) applied to the ROMAtrix, considering specific switching patterns. The proposed switching procedure was simulated with PLECS and validated with the hardware-in-the-loop using the OPAL-RT solver

    A Simplified Multilevel Space Vector Pulsewidth Modulation (SVPWM) Based on Boundary Lines, Including Overmodulation Zone

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    Space vector pulsewidth modulation (SVPWM) is a superior switching technique offering several benefits for power electronic inverters. However, concerning multilevel inverters (MLIs), implementing SVPWM is a demanding and time-consuming task because it deals with the six sectors of the space vector modulation (SVM) plane and numerous regions and vectors. Several research works in the literature tried to simplify SVPWM implementation for MLIs. This article introduces an SVPWM strategy, aiming to simplify the designing process and reduce the computational burden of the multilevel SVPWM. In this method, the switching process is designed only for the first sector of the SVM plane. The duty cycles and the switching states of the other sectors are assigned by transferring and translating techniques. The proposed method only uses basic algebraic functions in order to save the limited hardware resources of the processor. The same basic functions are used to handle overmodulation operations. This method introduces the boundary lines concept, which is a useful tool to detect the region and assign the switching states. Simulation and hardware-in-the-loop results are provided to validate the functionality of the proposed SVPWM. The hardware resource used on the field-programmable gate array module is adopted as a criterion to compare the proposed method with one of the conventional SVPWMs. This article is accompanied by MATLAB simulation files, for a three-level and a five-level inverter, provided by the authors as supplementary material

    Current sharing control modeling and design for power supplies in nuclear fusion applications

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    Power electronics converters employed in nuclear fusion applications have been recently assuming a crucial role for coils power supplies as they are particularly challenging not only due to the very high current amplitude, but also to guarantee a proper plasma confinement and control for tens of years. To face such demanding requirements, with focus on the Central Solenoid power supplies of the Divertor Tokamak Test (DTT) facility, this paper analyzes a parallel-connected H-bridges (HBs) DC-DC converter characterized by relatively low voltages and very high current ratings (tens of kiloamperes), quite unusual in industry applications. A specific mathematical model, including the high frequency disturbances identification, has been pointed out for the first time in literature. A control strategy, which also aims to maximize the current sharing among all HBs legs, is proposed and tuned through a model-based design. The Hardware-in-the-loop test facility has confirmed the validity of the presented control by keeping the load current error below DTT requirements and by correctly balancing each HB leg current. These results have been furtherly experimentally validated through a Prototype test bench

    Model Predictive Control with Sphere-Decoding Algorithm for parallel-connected H-Bridges

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    This paper presents a Sphere-Decoding algorithm (SDA) Model Predictive Control (MPC) for a parallel-connected H-Bridges Power Supply (PS). The proposed converter topology faces the very high current peaks (tens of kiloamperes) required by Central Solenoid coils of the Divertor Tokamak Test (DTT) facility for nuclear fusion, quite unusual in industry applications. The choice of the control strategy aims at exploiting the very fast transient response of MPC over linear control schemes and the computational burden reduction of SDA. As a result, this approach is able to guarantee a low load current error tracking and an effective current sharing among H-Bridges, thus a proper plasma initiation and its magnetic confinement for tens of years. In order to implement the SDA-MPC, the mathematical model of the presented PS is firstly introduced and validated. Afterwards, the SDA-MPC performances are tested through simulations. Experimental tests are carried out on a Hardware-In-the-Loop test facility

    A digital filter for speed noise reduction in drives using an electromagnetic resolver

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    The measurement of the rotation speed is an important issue in closed-loop industrial drives. The motor speed is often calculated by a derivative operation of the position measure obtained by an electromagnetic resolver. As a consequence, especially at the lowest speeds, the noise overlapped to the measured speed is significant and a suitable filter becomes necessary. The paper presents a solution to such a problem based on the employment of a stationary Kalman filter, suitably inserted in a phase locked loop structure. The implementation in an industrial synchronous motor drive, using a 16-bit fixed point DSP, has confirmed the goodness of the proposed solution

    Model Predictive Control for Tokamak Central Solenoid Power Supply

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    Power Supply (PS) systems for nuclear fusion coils are particularly challenging because of the very high current amplitude (tens of kiloamperes), quite unusual in industry applications. Moreover, they need to guarantee a proper plasma initiation and its magnetic confinement for tens of years. To face such demanding requirements, with focus on the Central Solenoid PS of the Divertor Tokamak Test (DTT) facility, Voltage Source Converters are currently under investigation. In particular, this paper analyzes a parallel-connected H-Bridges DC-DC converter. The proposed control strategy consists in a Sphere-Decoding Algorithm (SDA) Model Predictive Control (MPC). This choice aims at exploiting the very fast transient response of MPC and the computational burden reduction of SDA. In order to implement the SDA-MPC, the mathematical model of the presented PS is firstly introduced and validated. Afterwards, the SDA-MPC simulation results are shown and its performance is compared with an interleaved control strategy

    Comparison of two three-phase pll systems for more electric aircraft converters

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    The more electric aircraft power system is characterized by variable supply frequency, in general between 360 and 900 Hz. All equipment on board the aircraft have to operate delivering high performance under this variable frequency condition. In particular, power electronic converters need accurate control algorithms able to track the fundamental phase and frequency in real time, both in normal and unusual conditions. Phase-locked loop (PLL)-based algorithms are commonly used in traditional single-and three-phase power systems to provide phase and frequency estimations of the supply. Despite the simplicity of those algorithms, large estimation errors can arise when power supply voltage has variable frequency or amplitude, presents unbalances or is polluted with harmonics. To improve the quality of the phase and frequency real-time estimations, a robust PLL algorithm, based on a prediction-correction filter, is presented in this paper and compared with a discrete Fourier transform based procedure. The performances of the two algorithms, implemented in a floating-point DSP, have been compared through an experimental validation obtained on a laboratory power converter prototype. © 2014 IEEE

    Sensitivity to Parameters' Variations in Sensorless Induction Motor Drives using a Reduced Order MRAS Observer

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    In recent years, the elimination of the speed transducer in vector controlled induction motor drives has assumed a particular importance and so several methods have been proposed to estimate the motor speed. One of the simplest approaches utilizes a Model Reference Adaptive System using a reduced order reference model. The main problem connected to this approach is represented by the inaccuracy of the speed estimation due to parameters’ errors. In particular, in the low speed region any error between the actual value of the stator resistance and that used within the speed estimator may lead not only to a substantial speed estimation error but also to drive instability. The paper takes into consideration the MRAS approach and presents a simple methodology to determine, in analytical way, the sensitivity of the speed estimation to electromagnetic parameters’ variations. The obtained sensitivity formulae were verified by a suitable simulation program, in Matlab-Simulink environment

    Current Sharing Control Strategy for parallel-connected H-Bridges DC-DC Converter: Modelling, Analysis and HIL test

    No full text
    Power Electronics Converters employed in nuclear fusion applications have been recently assuming a crucial role for reactors' coils power supply systems as they are particularly challenging not only due to the very high current amplitude, but also to guarantee a proper plasma acceleration and its magnetic confinement for tens of years. To face such demanding requirements, with focus on the Poloidal Field Power Supplies of the Divertor Tokamak Test (DTT) facility, this paper analyzes a parallel-connected H-Bridges (HBs) DCDC converter characterized by relatively low voltages and very high current ratings (tens of kA), quite unusual in industry applications. A specific mathematical model, including the high frequency disturbances identification, has been pointed out for the first time in literature. A current control strategy, which aims at maximizing the current sharing among all HBs legs, is proposed as well. The simulation results have confirmed the validity of the presented control by keeping the load current error below 0.015% and by correctly balancing each HB leg current. These results have been furtherly validated through a Hardware-in-the-loop test facility

    Single solution sphere-decoding algorithm model predictive control for high-current applications

    No full text
    This paper presents a Sphere-Decoding algorithm (SDA) Model Predictive Control (MPC) for a parallel-connected H-Bridges Power Supply (PS). The proposed converter topology faces the very high current peaks (tens of kiloamperes) required by Central Solenoid coils of the Divertor Tokamak Test (DTT) facility for nuclear fusion, quite unusual in industry applications. The choice of the control strategy aims at exploiting the very fast transient response of MPC over linear control schemes and the computational burden reduction of SDA. As a result, this approach is able to guarantee a low load current tracking error and an effective current sharing among H-Bridges, thus proper operations for tens of years. In order to implement the SDA-MPC on a FPGA-based control board, fast but characterized by limited memory, the mathematical model of the PS is first introduced and the SDA-MPC procedure is then mathematically modified to find a single optimized solution. This simplification guarantees a remarkable reduction of the computational burden, avoiding the analysis of a set of possibilities, without losing in control effectiveness. Its performances are verified through simulations and experimentally validated with Hardware-In-the-Loop and prototype tests
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