322,988 research outputs found
Anti-islanding detector based on a robust PLL
No full textInternational Standards impose to Distributed Energy Resources, connected to the grid by an inverter, to detect an islanding condition within a suitable time interval. In this paper a Phase Locked Loop (PLL), based on a third-order prediction-correction filter, is proposed to implement an islanding detector with reduced detection time. Such feature is obtained using the estimation of the grid angular frequency and acceleration provided by the PLL with a negligible time delay. The proposed approach is implemented on a DSP and validated through an experimental comparison among different detection methods, such as Rate of Change of Frequency (ROCOF) and Sleep Mode frequency Shift (SMS). A combined use of ROCOF and SMS is also illustrated and discussed. © 2013 IEEE
A digital filter for speed noise reduction in drives using an electromagnetic resolver
No full textThe measurement of the rotation speed is an important issue in closed-loop industrial drives. The motor speed is often calculated by a derivative operation of the position measure obtained by an electromagnetic resolver. As a consequence, especially at the lowest speeds, the noise overlapped to the measured speed is significant and a suitable filter becomes necessary. The paper presents a solution to such a problem based on the employment of a stationary Kalman filter, suitably inserted in a phase locked loop structure. The implementation in an industrial synchronous motor drive, using a 16-bit fixed point DSP, has confirmed the goodness of the proposed solution
Hardware-in-the-Loop Implementation of ROMAtrix, a Smart Transformer for Future Power Grids
No full textThe evolution of power generation brings about extensive changes in other parts of the grid, especially in the transmission and distribution components. Within the scope of the Internet of Energy (IoE), electric power flows more flexibly between different parts of the grid. DC power will play an essential role in IoE. Decentralized photovoltaic panels, energy storage, electric vehicle charging stations, and data centers are some of the significant components of future grids dealing with DC power. As a result, power transformers must be appropriately modified to manage power among the different parts of the grid. A power electronic transformer (PET), also known as a solid-state transformer (SST) or smart transformer (ST), is a solution enabling a power grid to deal with this growing complexity. ROMAtrix, as a matrix-converter-based ST, is a developing project targeting future power grids. ROMAtrix realizes the application of a medium voltage (MV) transformer using commercially available power electronic semiconductors. Due to the distinctive features of ROMAtrix and a high number of switches, the implementation of the control system using a single control board is highly demanding. This paper aims to illustrate the implementation, on a field-programmable gate array (FPGA), of pulse width modulation (SVMPWM) applied to the ROMAtrix, considering specific switching patterns. The proposed switching procedure was simulated with PLECS and validated with the hardware-in-the-loop using the OPAL-RT solver
A Simplified Multilevel Space Vector Pulsewidth Modulation (SVPWM) Based on Boundary Lines, Including Overmodulation Zone
No full textSpace vector pulsewidth modulation (SVPWM) is a superior switching technique offering several benefits for power electronic inverters. However, concerning multilevel inverters (MLIs), implementing SVPWM is a demanding and time-consuming task because it deals with the six sectors of the space vector modulation (SVM) plane and numerous regions and vectors. Several research works in the literature tried to simplify SVPWM implementation for MLIs. This article introduces an SVPWM strategy, aiming to simplify the designing process and reduce the computational burden of the multilevel SVPWM. In this method, the switching process is designed only for the first sector of the SVM plane. The duty cycles and the switching states of the other sectors are assigned by transferring and translating techniques. The proposed method only uses basic algebraic functions in order to save the limited hardware resources of the processor. The same basic functions are used to handle overmodulation operations. This method introduces the boundary lines concept, which is a useful tool to detect the region and assign the switching states. Simulation and hardware-in-the-loop results are provided to validate the functionality of the proposed SVPWM. The hardware resource used on the field-programmable gate array module is adopted as a criterion to compare the proposed method with one of the conventional SVPWMs. This article is accompanied by MATLAB simulation files, for a three-level and a five-level inverter, provided by the authors as supplementary material
Sensitivity to Parameters' Variations in Sensorless Induction Motor Drives using a Reduced Order MRAS Observer
No full textIn recent years, the elimination of the speed transducer in vector controlled induction motor drives has assumed a particular importance and so several methods have been proposed to estimate the motor speed. One of the simplest approaches utilizes a Model Reference Adaptive System using a reduced order reference model. The main problem connected to this approach is represented by the inaccuracy of the speed estimation due to parameters’ errors. In particular, in the low speed region any error between the actual value of the stator resistance and that used within the speed estimator may lead not only to a substantial speed estimation error but also to drive instability. The paper takes into consideration the MRAS approach and presents a simple methodology to determine, in analytical way, the sensitivity of the speed estimation to electromagnetic parameters’ variations. The obtained sensitivity formulae were verified by a suitable simulation program, in Matlab-Simulink environment
Performances of a PLL based digital filter for double-conversion UPS
No full textIn uninterruptible power supplies (UPS) using an automatic bypass switch, to reduce the transients due to the switch commutations, it is convenient that the voltage waveforms produced by the inverter are synchronized with the grid ones. In three-phase UPS, the inverter controller employs, as reference signals, the components of the grid voltage phasor, referred to a fix reference frame, suitably multiplied by an amplitude correction factor. Generally, the reference signals are affected by harmonics and amplitude unbalances. Therefore, improper synchronization between the inverter outputs and the grid voltages can arise. To improve the synchronization, many solutions based on a phase locked loop (PLL) system have been proposed in literature. The paper proposes a different PLL structure employing a Steady-State Linear Kalman Filter (SSLKF), based on a third-order linear and time-invariant observation model. Such filter is able to provide an accurate tracking of the grid voltage phasor also in critical operating conditions. The paper describes, at first, different PLL structures and then the proposed architecture based on a prediction-correction filter and its implementation on a DSP controller. Finally, a comparison, obtained by simulation, with traditional filters and some significant experimental results on a pre-production prototype are carried out. © 2008 IEEE
A Novel Repetitive Controller Assisted Phase-Locked Loop with Self-Learning Disturbance Rejection Capability for Three-Phase Grids
No full textThe synchronization between the power grid and distributed power sources is a crucial issue in the concept of smart grids. For tracking the real-Time frequency and phase of three-phase grids, phase-locked loop (PLL) technology is commonly used. Many existing PLLs with enhanced disturbance/harmonic rejection capabilities, either fail to maintain fast response or are not adaptive to grid frequency variations or have high computational complexity. This article, therefore, proposes a low computational burden repetitive controller (RC) assisted PLL (RCA-PLL) that is not only effective on harmonic rejection but also has remarkable steady-state performance while maintaining fast dynamic. Moreover, the proposed PLL is adaptive to variable frequency conditions and can self-learn the harmonics to be canceled. The disturbance/harmonic rejection capabilities together with dynamic and steady-state performances of the RCA-PLL have been highlighted in this article. The proposed approach is also experimentally compared to the synchronous rotation frame PLL (SRF-PLL) and the steady-state linear Kalman filter PLL (SSLKF-PLL), considering the effect of harmonics from the grid-connected converters, unbalances, sensor scaling errors, dc offsets, grid frequency variations, and phase jumps. The computational burden of the RCA-PLL is also minimized, achieving an experimental execution time of only 12~mu ext{s}. © 2013 IEEE
Repetitive Learning Control Design for LED Light Tracking
No full textA lighting system composed of three color light-emitting diode (LED) strings is considered. On the basis of a simplified dynamic model (with uncertainties) for the aforementioned system, the tracking of (possibly complex) periodic reference signals (with known period) for both the light color and intensity is achieved by designing, for each LED string, a decentralized repetitive learning control. Experimental results illustrate the effectiveness of the proposed approach in a practical user-friendly scenario: the color coordinates are obtained by an external low-cost red, green, blue sensor which allows for measuring the overall lighting effects (including external disturbances) while increasing the overall energy saving. A detailed theoretical analysis of the learning control design for first-order linear systems with zero relative degree under suitable assumptions is also included
Current sharing control modeling and design for power supplies in nuclear fusion applications
No full textPower electronics converters employed in nuclear fusion applications have been recently assuming a crucial role for coils power supplies as they are particularly challenging not only due to the very high current amplitude, but also to guarantee a proper plasma confinement and control for tens of years. To face such demanding requirements, with focus on the Central Solenoid power supplies of the Divertor Tokamak Test (DTT) facility, this paper analyzes a parallel-connected H-bridges (HBs) DC-DC converter characterized by relatively low voltages and very high current ratings (tens of kiloamperes), quite unusual in industry applications. A specific mathematical model, including the high frequency disturbances identification, has been pointed out for the first time in literature. A control strategy, which also aims to maximize the current sharing among all HBs legs, is proposed and tuned through a model-based design. The Hardware-in-the-loop test facility has confirmed the validity of the presented control by keeping the load current error below DTT requirements and by correctly balancing each HB leg current. These results have been furtherly experimentally validated through a Prototype test bench
A robust synchronization method for centralized microgrids
No full textMicrogrids represent one of the best candidates to redesign the architecture of the future distribution network. Such a model, in fact, promises to be able to properly manage a larger penetration of Distributed Energy Resources while improving the local production and utilization of energy. On the other hand, the control of a Microgrid is quite challenging, since the system has to be particularly reliable and flexible, due to the requested multiple and concurrent tasks to be performed. In this scenario the present paper proposes a novel solution able to synchronize the phase and the frequency of all the devices connected to the Microgrid in many different and complex ways. The proposed method, in particular, is based on the combined use of Phase Locked Loops and the 1 Pulse Per Second signal provided by any GPS device
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