1,721,077 research outputs found
ANALYSIS AND SYNTHESIS OF DOUBLE LAYER MOSFET NETWORKS FOR SMART SENSORY SYSTEMS
An analysis method to find the natural response of double-layer planar lattice networks is found and its stability discussed. Following the proposed approach, a new circuit able to perform feature extraction at the sensory level by means of a convolution with a Gabor-like kernel is synthesised. The circuit, based on MOS transistors working in the subthreshold region, has been simulated and successfully compared with theoretical expectations. Its main features are the compactness, low-power and full programmability of the convolutional kernel
A reconfigurable CMOS imager for real-time, spatio-temporal image processing with on chip ADC
A Low-Power Integrated Smart Sensor with on-Chip Real-Time Image Processing Capabilities
A low-power, CMOS retina with real-time, pixel-level processing capabilities is presented. Features extraction and edge-enhancement are implemented with fully programmable 1D Gabor convolutions. An equivalent computation rate of 3 GOPS is obtained at the cost of very low-power consumption ( W per pixel), providing real-time performances ( microseconds for overall computation, ). Experimental results from the first realized prototype show a very good matching between measures and expected outputs.</p
A field-effect device for the detection of small quantities of electric charge, such as those generated in bio-molecular processes, bound in the vicinity of the surface
A charge-modulated FET for detection of biomolecular processes: Conception, modeling, and simulation
A novel, solid-state sensor for charge detection in biomolecular processes is proposed. The device, called charge-modulated field-effect transistor, is compatible with a standard CMOS process, thus allowing fully electronic readout and large scale of integration of biosensors on a single chip. The detection mechanism is based on the field-effect modulation induced by electric charge changes related to the bioprocess. A model of the device was developed, to provide a manageable relationship between its output and geometric, design and process parameters. Extensive two- and three-dimensional simulations of the proposed structure validated the model and the working principle
A Reconfigurable CMOS Imager for Real-Time, Spatio-Temporal Image Processing with On-Chip ADC
"Dispositivo ad effetto di campo per la rilevazione di strati di carica elettrica localizzati nelle vicinanze della sua superficie",
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