202,341 research outputs found
The application of land evaluation technique in the north-east of Libya
No full textLand evaluation is a prerequisite to achieving optimum utilisation of available land resources for agricultural production. The principal purpose of land evaluation is to predict the potential and the limitations of land for changing use. Food security is one of the most important issues of agriculture policy in Libya. The country aims to obtain self‐sufficiency for its in agricultural products which contribute largely to the diet of most of the population. Therefore, eighty per cent of water transferred from aquifer‐sourced in the south of the country to the north, is planned for agriculture development. Cereal crops such wheat, barley, maize and sorghum are given the highest priority. There is, therefore, a pressing need to develop an optimal land evaluation method to identify in which part of a region these selected crops could e grown favourably. The model should be developed in accordance with the priorities of the Libyan Government in developing a practical and applicable land evaluation system that can be used by the average computer user.
The FAO Framework was selected to conduct the land suitability assessment. This selection was based upon extensive and critical review of land evaluation methodologies and an evaluation of the objectives for and of the data available for study area. The FAO framework is a set of guidelines rather than a classification system, and model used builds upon this
Quasi-Static Voltage Scaling for Energy Minimization with Time Constraints
No full textSupply voltage scaling and adaptive body-biasing are important tech-niques that help to reduce the energy dissipation of embedded systems. This is achieved by dynamically adjusting the voltage and performance settings according to the application needs. In order to take full ad-vantage of slack that arises from variations in the execution time, it is important to recalculate the voltage (performance) settings during run-time, i.e., online. However, voltage scaling (VS) is computationally ex-pensive, and thus significantly hampers the possible energy savings. To overcome the online complexity, we propose a quasi-static voltage scal-ing scheme, with a constant online time complexity O(1). This allows to increase the exploitable slack as well as to avoid the energy dissipated due to online recalculation of the voltage settings. We conduct several experiments that demonstrate the advantages of the proposed technique over the previously published voltage scaling approaches
Application of Analog Adaptive Filters for Dynamic Sensor Compensation
No full textThis paper investigates the application of analog adaptive techniques to the area of dynamic sensor compensation, of which there is little reported work in the literature. The case is illustrated by showing how the response of a load cell can be improved to speed up the process of measurement. The load cell is a sensor with an oscillatory output in which the measurand contributes to the response parameters. Thus, a compensation filter needs to track variation in measurand whereas a simple, fixed filter is only valid at one specific load value. To facilitate this investigation, computer models for the load cell and the adaptive compensation filter have been developed. To allow a practical implementation of the adaptive techniques, a novel piecewise linearization technique is proposed in order to vary a floating voltage-controlled resistor in a linear manner over a wide range. Simulation and practical results are presented, thus demonstrating the effectiveness of the proposed techniques
Synthesising Energy-Efficient Embedded Systems with LOPOCOS
No full textIn this paper, we introduce the LOPOCOS (Low Power Co-synthesis) system, a prototype CAD tool for system level co-design. LOPOCOS targets the design of energy-efficient embedded systems, implemented as heterogeneous distributed architectures. In particular, it is designed to solve the specific problems involved in architectures that include dynamic voltage scalable (DVS) processors. The aim of this paper is to demonstrate how LOPOCOS can support the system designer in identifying energy-efficient hardware/software implementations for the desired embedded systems. Hence, highlighting the necessary optimisation steps during design space exploration for DVS enable architectures. The optimisation steps carried out in LOPOCOS involve component allocation and task/communication mapping as well as scheduling and dynamic voltage scaling. LOPOCOS has the following key features, which contribute to this energy efficiency. During the voltage scaling valuable power profile information of task execution is taken into account, hence, the accuracy of the energy estimation is improved. A combined optimisation for scheduling and communication mapping based on genetic algorithm, optimises simultaneously execution order and communication mapping towards the utilisation of the DVS processors and timing behaviour. Furthermore, a separation of task and communication mapping allows a more effective implementation of both task and communication mapping optimisation steps. Extensive experiments are conducted to demonstrate the efficiency of LOPOCOS. We report up to 38% higher energy reductions compared to previous co-synthesis techniques for DVS systems. The investigations include a real-life example of an optical flow detection algorithm
Synthesizing Energy-Efficient Embedded Systems with LOPOCOS
No full textIn this paper, we introduce the LOPOCOS (Low Power Co-synthesis) system, a prototype CAD tool for system level co-design. LOPOCOS targets the design of energy-efficient embedded systems, implemented as heterogeneous distributed architectures. In particular, it is designed to solve the specific problems involved in architectures that include dynamic voltage scalable (DVS) processors. The aim of this paper is to demonstrate how LOPOCOS can support the system designer in identifying energy-efficient hardware/software implementations for the desired embedded systems. Hence, highlighting the necessary optimisation steps during design space exploration for DVS enable architectures. The optimisation steps carried out in LOPOCOS involve component allocation and task/communication mapping as well as scheduling and dynamic voltage scaling. LOPOCOS has the following key features, which contribute to this energy efficiency. During the voltage scaling valuable power profile information of task execution is taken into account, hence, the accuracy of the energy estimation is improved. A combined optimisation for scheduling and communication mapping based on genetic algorithm, optimises simultaneously execution order and communication mapping towards the utilisation of the DVS processors and timing behaviour. Furthermore, a separation of task and communication mapping allows a more effective implementation of both task and communication mapping optimisation steps. Extensive experiments are conducted to demonstrate the efficiency of LOPOCOS. We report up to 38% higher energy reductions compared to previous co-synthesis techniques for DVS systems. The investigations include a real-life example of an optical flow detection algorithm
The International Criminal Justice System’s Response to Genocide: A Case Study of the Darfur Conflict and President Omar Hassan Ahmad al-Bashir
No full textPhotovoltaic sample-and-hold circuit enabling MPPT indoors for low-power systems
No full textPhotovoltaic (PV) energy harvesting is commonly used to power autonomous devices, and maximum power point tracking (MPPT) is often used to optimize its efficiency. This paper describes an ultra low-power MPPT circuit with a novel sample-and-hold and cold-start arrangement, enabling MPPT across the range of light intensities found indoors, which has not been reported before. The circuit has been validated in practice and found to cold-start and operate from 100 lux (typical of dim indoor lighting) up to 5000 lux with a 55cm2 amorphous silicon PV module. It is more efficient than non-MPPT circuits, which are the state-of-the-art for indoor PV systems. The proposed circuit maximizes the active time of the PV module by carrying out samples only once per minute. The MPPT control arrangement draws a quiescent current draw of only 8µA, and does not require an additional light sensor as has been required by previously-reported low-power MPPT circuits
A Scalable Turbo Decoding Algorithm for High-Throughput Network-on-Chip Implementation
No full textMatlab codes relating to the article Al-Dujaily, Ra'ed, Li, An, Maunder, Robert G, Mak, Terrence, Al-Hashimi, Bashir M. and Hanzo, Lajos (2016) A Scalable Turbo Decoding Algorithm for High-Throughput Network-on-Chip Implementation. IEEE Access.</span
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