1,721,154 research outputs found
A 150MSample/s 20mW BiCMOS switched capacitor biquad using precise gain opamps
No full textThis paper presents a design approach to realize high-frequency IIR SC filters. The trade-off between speed-and-gain in the design of the op amps is overcome by designing a simple and compact amplifier with a limited but precisely controlled gain. The finite gain effect is taken into account in the filter design by adjusting the capacitor ratio. In addition the filter uses nMOS-only switches therefore requiring a standard two-phase clock. Finally the clock-to-bandwidth ratio is equal to 10, so a fairly non-critical anti-aliasing filter is neede
A 1-V 1.8-MHz CMOS switched-opamp SC filter with rail-to-rail output swing
No full textA low-voltage switched capacitor (SC) filter operated from a single 1 V supply and realized in a standard 0.5-μm CMOS technology is presented. Proper operation is obtained using the switched-opamp technique without any clock voltage multiplier or low-threshold devices. This makes the circuit compatible with future deep submicrometer technology. As opposed to previous switched-opamp implementations, the filter uses a fully differential topology. This allows operation with a rail-rail output swing and reduction of the number of opamps required to build high order infinite impulse response (IIR) filters. On the other hand, a low-voltage common-mode feedback (CMFB) circuit is required. In addition, the circuit uses an opamp which is only partially turned off during the off phase. This enables an increase in the maximum sampling frequency. The filter implements a bandpass response (fs/f o=4, Q=7) and it has been characterized with a 1.8 MHz sampling frequency. Its power consumption is about 160 μW. The filter is still fully functional down to 0.9 V supply voltag
Low-voltage fully-differential switched-opamp bandpass ΣΔ modulator
No full textThe paper deals with the design of a low-voltage bandpass ΣΔ modulator implemented with the switched-capacitor technique. To use standard technology (no low-threshold devices) and without an on-chip voltage multiplier, the switched-opamp technique has been adopted. The basic building blocks for the construction of a ΣΔ modulator (SC integrator, quantiser, and feedback DAC) are proposed in a fully differential version. In addition, they have been improved with respect to those previously reported to give a larger output swing at a higher sampling frequency and without any voltage reference. The validity of the proposed circuits is demonstrated by the realisation of a second-order bandpass ΣΔ modulator operating with a single 1 V supply within a standard 0.5 μm CMOS technology (VTHn=0.65 V, VTHp=0.7 V). The modulator operates at a sampling frequency of 1.8 MHz with a full-scale input range of 2 Vpk-pk and achieves a 45 dB dynamic range in a 20 kHz bandwidt
A 200-Ms/s 10-mW switched-capacitor filter in 0.5μm CMOS technology
No full textWideband amplifiers with low but precisely known dc gain allow the achievement of accurate infinite impulse response switched-capacitor (SC) filters operating at very high sampling frequencies. The low and precise opamp gain value is taken into account while sizing the capacitors (precise opamp gain (FOG) approach), so that no idle phase is required for amplitude error compensation and double-sampling technique can be implemented. In a 0.5-μm standard CMOS technology with 3.3-V power supply, an opamp is designed which exhibits a settling time of about 3 ns (for 0.1% settling accuracy) in a closed-loop configuration with input, feedback, and load capacitors of 0.5 pF, white the slew rate is 1 V/ns. The open-loop dc gain of the amplifier is set to the value of 80 (38 dB) by a gain-control closed loop, which guarantees an accuracy of ±2%. The proposed solution is validated by experimental results from a 200-Ms/s SC filter. From a single 3.3-V supply the filter consumes 10 mW (excluding clock generation) and exhibits a -40 dB total harmonic distortion for a 2-Vpp signal amplitude at 4 MHz, achieving a 62-dB dynamic rang
An algorithm for the automatic design and the power optimisation of Active-Gm-RC continuous-time biquadratic cells
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