1,721,186 research outputs found
Notions on Silicon Physically Unclonable Functions
No full textPhysically nclonable function (PUF) is not a formally defined concept and, being a hot topic in the security field, in the literature many definitions and properties have been given. Moreover, the major research effort has been focused on the definition of quality parameters such that its PUF architectures can be compared to each other. For these reasons, in this chapter, we group most of notions and concepts given in the literature with formal descriptions and terminology, aiming to clearly define any property and physical characteristic, discussing PUF implementations and security issues
Implementation of a reliable mechanism for protecting IP cores on low-end FPGA devices
No full textField programmable gate array (FPGA) technology is being adopted in many digital systems, hence the demand for security increases, especially when intrinsic vulnerabilities of programmable devices jeopardise the intellectual properties (IPs). New high and medium-end FPGA devices have built-in mechanisms that, exploiting encryption primitives, are able to avoid IP piracy by preventing cloning and reverse engineering, but low-end FPGA families still lack security solutions. Recently, in the literature, a great researching effort has been done on physically unclonable functions (PUFs), which are eligible to be a fundamental means for authenticating integrated circuits. They can be adopted to guarantee protection against IP violations by implementing locking finite state machines (FSMs) on any device. In this paper, we show two implementations of the Anderson PUF, a good scalable and high reliable PUF architecture, on the Xilinx Spartan-3E family, which can be adopted to introduce the locking mechanism. In the experimental result, we show the quality parameters for signatures generated from proposed Anderson PUFs and the overhead introduced by the locking mechanism through an FSM
Formal Design Space Exploration for memristor-based crossbar architecture
No full textThe unceasing shrinking process of CMOS technology is leading to its physical limits, impacting several aspects, such as performances, power consumption and many others. Alternative solutions are under investigation in order to overcome CMOS limitations. Among them, the memristor is one of promising technologies. Several works have been proposed so far, describing how to synthesize boolean logic functions on memristors-based crossbar architecture. However, depending on the synthesis parameters, different architectures can be obtained. Design Space Exploration (DSE) is therefore mandatory to help and guide the designer in order to select the best crossbar configuration. In this paper, we present a formal DSE approach. The main advantage is that it does not require any simulation and thus it avoids any runtime overheads. Preliminary results show the huge gain in runtime compared to simulation-based DSE
Ensuring End-to-End Security in Computing Continuum Exploiting Physical Unclonable Functions
No full textIn recent years, there has been an increase in Cloud Continuum adoption to support Internet of Things applications. Inevitably, such a paradigm introduces novel security challenges, particularly concerning the security of communicating nodes to prevent malicious actors from tampering within the network, and ensuring the confidentiality of sensitive data during transmissions. Traditional security methods often fall short in addressing these issues, especially where network nodes are built upon resource-constrained devices. Consequently, the scientific community has begun exploring the potential of Physical Unclonable Functions (PUFs), which are unique digital identifiers derived from the inherent variability in the manufacturing process of integrated circuits, as a means to enhance security mechanisms at minimal overhead cost. This paper introduces Secure-PHEMAP (S-PHEMAP), a novel and lightweight PUF-based key management scheme designed for end-to-end communications that guarantees authenticity, confidentiality and integrity for pair communications. The proposed scheme builds upon the PHEMAP protocols, inheriting its security properties. S-PHEMAP can be employed in scenarios where both communicating devices embeds a PUF or in situations where only one of them has a PUF. In addition, the paper includes a deployment strategy in a Cloud Continuum domain, by leveraging the Chef automation framework
Estimating dynamic power consumption for memristor-based CiM architecture
No full textNowadays, Computing-in-Memory (CiM) represents one of the most relevant solutions to deal with CMOS technological issues and several works have been proposed so far targeting front and back-end synthesis. However, a given CiM architecture can be synthesized depending on different parameters, leading to different implementations w.r.t. area, power consumption and performance. It is thus mandatory to have an evaluation framework to characterize the actual implementation depending on the above terms. This is even more important during the Design Exploration phase, in which many different implementations are explored to identify the best candidate w.r.t. the user requirements. In this work, we focus on the dynamic power consumption estimation of a given CiM implementation. Instead of resorting to a simulation-based power estimation, we propose an analytical approach that will dramatically speed up the estimation since no simulations are required. By comparing the proposed approach against the simulation-based method over a massive experimental campaign, we show that the accuracy of the estimation turns out to be very high
Authenticating IoT Devices with Physically Unclonable Functions Models
No full textWirelessly connected smart embedded devices, forming the so called Internet of Things network, have achieved unprecedented levels of diffusion as they are adopted in many application domains, ranging from goods transportation to eHealth monitoring infrastructure. As they are always inherently connected, hence exposed to attacks, and as they densely populate our daily life collecting, managing and elaborating data, security has drawn a lot of attention in the literature. In a crowded network, classical security approaches may be not adequate, since they require secret sharing or public key distribution infrastructures. Physically Unclonable Functions (PUFs), introduced so far, are exploitable as security primitives, providing easy authentication and secure key storage mechanisms. Traditional PUF authentication schemes rely on the enrollment of some challenge/response pairs (CRPs), extracted before each device is issued, as it is not feasible to retrieve the whole CRPs set. Moreover, accomplishing such a procedure may introduce a significant overhead due to the cardinality of extracted CRPs and due to size of the device population. To avoid these issues, in this paper we exploit the knowledge of a PUF model in order to make available the whole CRPs set, and, by adopting an encryption scheme, we hide it to avoid model based attacks which can be performed on CRPs sent in clear. To this aim, we show an implementation based on the Anderson PUF and on AES, realized on a Xilinx Zynq-7000 Field Programmable Gate Array
Ring oscillators analysis for security purposes in Spartan-6 FPGAs
No full textNowadays, many digital applications domains are arising and posing new design issued and challenges related to the security and trustworthiness. Physically Unclonable Functions (PUFs) are emergent and promising solutions in providing some security mechanisms, such as key storing and generation, challenge/response provider, and protection of Intellectual Properties (IPs). As a huge range of embedded applications is deployed on Field Programmable Gate Arrays (FPGAs) devices, most widespread PUFs’ architectures are based on Ring Oscillators (ROs), as they are suitable for an implementation on programmable devices. ROPUF exploits comparisons of measured frequencies, obtained by picking a RO pair, aiming to generate bit responses. In this paper, we present a study of the frequencies characteristics, implementing ROs on a significant number of Xilinx Spartan 6 devices, in order to statistically characterize the oscillations, evaluating the impact of some external uncontrolled parameters that can disturb and alter their original qualities, useful to validate the effectiveness of the ROPUF
Chain-of-trust for microcontrollers using SRAM PUFs: The linux case study
No full textMany security challenges have emerged from what is defined as Internet of Things (IoT), due to the inherent permanent connection of devices involved in networks. Furthermore, IoT devices are often deployed in unattended working environment and, hence, they are prone to physical attacks. Attackers take advantages of such weaknesses to clone devices, tamper the software installed on them and extract cryptographic keys. In this paper, we propose a technique to exploit Static Random Access Memory based Phisical Unclonable Functions to have available a chain-oftrust on a microcontroller device. We prove its effectiveness in terms of reliability and required overhead by introducing a case study based on the STM32F7 device running the Linux operating system
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