143 research outputs found
Timing False Path Identification using ATPG Techniques
No full textA Project Report submitted to the University of Wisconsin -- Department of Electrical and Computer Engineering in partial fulfillment of the requirements for the degree of Master of Science Graduate Program in Electrical and Computer Engineering
Characterization of the passive layer on ferrite and austenite phases of super duplex stainless steel
No full textIn this study, we report on a combined microscopic, analytical and electrochemical characterization of the nanoscopic passive layer on a tungsten‑molybdenum-containing super duplex stainless steel. We used scanning transmission electron microscopy/energy dispersive X-ray spectroscopy, scanning Kelvin probe force microscopy, scanning tunneling spectroscopy, and Mott–Schottky electrochemical impedance spectroscopy analysis to correlate the local chemical composition and electronic properties of passive layers on austenite and ferrite phases. The passive layer on the ferrite phase contains a higher amount of Mo, W, and Cr, which accommodates a higher nobility of ferrite and a higher local energy of the band gap compared to those on the austenite. The two aforementioned phases exhibit a different composition and semi-conductive properties of their passive layers leading to dissimilar local corrosion susceptibility. These findings are of pivotal importance in further studies of austenite and ferrite phase resolved corrosion resistance of duplex stainless steel demanding a dedicated alloying strategy.Green Open Access added to TU Delft Institutional Repository 'You share, we take care!' - Taverne project https://www.openaccess.nl/en/you-share-we-take-care Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public.(OLD) MSE-6QN/Zandbergen La
Effective Graph Theoretic Techniques for the Generalized Low Power Binding Problem
No full textThis paper proposes two very fast graph theoretic heuristics for the low power binding problem given fixed number of resources and multiple architectures for the resources. First the generalized low power binding problem is formulated as an Integer Linear Programming(ILP) problem which happens to be an NP-complete task to solve. Then two polynomial-time heuristics are proposed that provide a speedup of up to 13.7 with an extremely low penalty for power when compared to the optimal ILP solution for our selected benchmarks
Optimization Schemes for Variability-Driven VLSI Design Automation
No full textToday's IC design is facing several challenges due to increasing circuit complexity and decreasing feature size, as it pushes to extend Moore's law into nano-scale dimensions. Apart from the challenges that arise directly as a result of feature scaling (e.g., increasing leakage power, reliability issues), imperfections in the manufacturing process have recently turned into a major design hurdle, due to the variations they cause in the device and interconnect parameters from their target values. From an IC design automation perspective, a shift in paradigm, from deterministic to probabilistic, is needed to handle the unpredictable nature of these fabrication variations. In such a probabilistic paradigm, the varying circuit parameters such as leakage power or delay should be accurately modeled, and their correlations due to common sources of variations or physical location on the chip should be well captured. Moreover, variability-driven (probabilistic) design automation needs to efficiently generate a high quality solution. A particular challenge in variability-driven design automation is to define optimality measures among candidate solutions, which allow for inferior solutions to be removed from the solution space thus reducing the run-time complexity. In this dissertation, the superiority probability is introduced as such an optimality measure, and two methods are proposed to compute this probability: an accurate Conditional Monte Carlo simulation method, and an efficient moment-matching approximation method. The effectiveness of using the superiority probability is shown in the context of two important design automation applications: 1) the buffer insertion problem, 2) the dual-Vth leakage optimization problem. Another important task in variability-driven design automation is to develop optimization techniques that can provably generate the optimal solution in an efficient way. In this dissertation, the application of the gate sizing problem is explored to optimally reduce the loss due to fabrication variations in the presence of a timing constraint. The presented formulation, in contrast with the existing variability-driven approaches which are all based on heuristics, is provably optimal. Moreover, unlike existing approaches, it is independent of any assumption on the source and nature of variations
Static IR Drop Prediction with Attention U-Net and Saliency-Based Explainability
No full textThere has been significant recent progress to reduce the computational effort of static IR drop analysis using neural networks, and modeling as an image-to-image translation task. A crucial issue is the lack of sufficient data from real industry designs to train these networks. Additionally, there is no methodology to explain a high-drop pixel in a predicted IR drop image to its specific root-causes. In this work, we first propose a U-Net neural network model with attention gates which is specifically tailored to achieve fast and accurate image-based static IR drop prediction. Attention gates allow selective emphasis on relevant parts of the input data without supervision which is desired because of the often sparse nature of the IR drop map. We propose a two-phase training process which utilizes a mix of artificially-generated data and a limited number of points from real designs. The results are, on-average, 18% (53%) better in MAE and 14% (113%) in F1 score compared to the winner of the ICCAD 2023 contest (and U-Net only) when tested on real designs. Second, we propose a fast method using saliency maps which can explain a predicted IR drop in terms of specific input pixels contributing the most to a drop. In our experiments, we show the number of high IR drop pixels can be reduced on-average by 18% by mimicking upsize of a tiny portion of PDN\u27s resistive edges
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