4,673 research outputs found
Designing embedded systems with 32-bit PIC microcontrollers and MikroC /
No full textThe new generation of 32-bit PIC microcontrollers can be used to solve the increasingly complex embedded system design challenges faced by engineers today. This book teaches the basics of 32-bit C programming, including an introduction to the PIC 32-bit C compiler. It includes a full description of the architecture of 32-bit PICs and their applications, along with coverage of the relevant development and debugging tools. Through a series of fully realized example projects, Dogan Ibrahim demonstrates how engineers can harness the power of this new technology to optimize their embedded design.Online resource; title from PDF title page (ebrary, viewed September 16, 2013).Front Cover; Designing Embedded Systems with 32-Bit PIC Microcontrollers and MikroC; Copyright; Contents; Preface; Acknowledgments; Chapter 1 -- Microcomputer Systems; 1.1 Introduction; 1.2 Microcontroller Systems; 1.3 Microcontroller Features; 1.4 Microcontroller Architectures; 1.5 8, 16, or 32Bits?; 1.6 Number Systems; 1.7 Converting Binary Numbers into Decimal; 1.8 Converting Decimal Numbers into Binary; 1.9 Converting Binary Numbers into Hexadecimal; 1.10 Converting Hexadecimal Numbers into Binary; 1.11 Converting Hexadecimal Numbers into Decimal.1.12 Converting Decimal Numbers into Hexadecimal1.13 Converting Octal Numbers into Decimal; 1.14 Converting Decimal Numbers into Octal; 1.15 Converting Octal Numbers into Binary; 1.16 Converting Binary Numbers into Octal; 1.17 Negative Numbers; 1.18 Adding Binary Numbers; 1.19 Subtracting Binary Numbers; 1.20 Multiplication of Binary Numbers; 1.21 Division of Binary Numbers; 1.22 Floating Point Numbers; 1.23 Converting a Floating Point Number into Decimal; 1.24 Binary Coded Decimal Numbers; 1.25 The American Standard Code for Information Interchange Table; 1.26 Summary; 1.27 Exercises.Chapter 2 -- PIC32 Microcontroller Series2.1 The PIC32MX360F512L Architecture; 2.2 Summary; 2.3 Exercises; Chapter 3 -- C Programming for 32-Bit PIC Microcontrollers; 3.1 Structure of a Simple mikroC Pro for PIC32 Program; 3.2 Functions; 3.3 PIC32 Microcontroller Specific Features; 3.4 Summary; 3.5 Exercises; Chapter 4 -- mikroC Pro for PIC32 Built-in Library Functions; 4.1 ADC Library; 4.2 LCD Library; 4.3 Software UART Library; 4.4 Hardware UART Library; 4.5 Sound Library; 4.6 ANSI C Library; 4.7 Miscellaneous Library; 4.8 Summary; 4.9 Exercises.Chapter 5 -- PIC32 Microcontroller Development Tools5.1 Software Development Tools; 5.2 Hardware Development Tools; 5.3 mikroC Pro for PIC32 IDE; 5.4 Summary; 5.5 Exercises; Chapter 6 -- Microcontroller Program Development; 6.1 Using the Program Description Language and Flowcharts; 6.2 Examples; 6.3 Representing for Loops in Flowcharts; 6.4 Summary; 6.5 Exercises; Chapter 7 -- Simple PIC32 Microcontroller Projects; 7.1 Project 7.1-LED DICE; 7.2 Project 7.2-Liquid-Crystal Display Event Counting; 7.3 Project 7.3-Creating a Custom LCD Character; 7.4 Project 7.4-LCD Progress Bar.7.5 Project 7.5-Shifting Text on LCD7.6 Project 7.6-External Interrupt-Based Event Counting Using LCD; 7.7 Project 7.7-Switch Contact Debouncing; 7.8 Project 7.8-Timer Interrupt-Based Counting; 7.9 Project 7.9-Temperature Measurement and Display on LCD; 7.10 Project 7.10-Playing a Melody; 7.11 Project 7.11-Playing a Melody Using Push-Button Switches; 7.12 Project 7.12-Generating Sine Wave Using D/A Converter; 7.13 Project 7.13-Communicating with a PC Using the RS232 PORT; 7.14 Project 7.14-Scrolling LCD Display; Chapter 8 -- Advanced PIC32 Projects.The new generation of 32-bit PIC microcontrollers can be used to solve the increasingly complex embedded system design challenges faced by engineers today. This book teaches the basics of 32-bit C programming, including an introduction to the PIC 32-bit C compiler. It includes a full description of the architecture of 32-bit PICs and their applications, along with coverage of the relevant development and debugging tools. Through a series of fully realized example projects, Dogan Ibrahim demonstrates how engineers can harness the power of this new technology to optimize their embedded design.Elsevie
Early detection of neurological disorders using machine learning systems Advances in medical technologies and clinical practice book series./ Sudip Paul, Pallab Bhattacharya, and Arindam Bit, editors.
No full textIncludes bibliographical references."This book examines the role of machine learning systems in the detection of neurological disorders such as Alzheimer disease, Parkinson's disease, schizophrenia, and depression"--Provided by publisher.Epileptic seizure detection and classification using machine learning -- Rekh Janghel, Yogesh Rathore, Gautam Tiparti -- A study on basal ganglia circuit and its relation with movement disorders / Ankita Tiwari, Raghuvendra Tripathi, Dinesh Bhatia -- Social media analytics to predict depression level in the users / Mohammad Shahid Husain -- Tremor identification using machine learning in Parkinson's disease -- Angana Saikia, Vinayak Majhi, Masaraf Hussain, Sudip Paul, Amitava Datta -- Soft computing based early detection of Parkinson's disease using non-invasive method based on speech analysis / Chandrasekar Ravi -- Neurofeedback -retrain the brain / Meena Gupta, Dinesh Bhatia -- Neurocognitive mechanisms for detecting early phase of depressive disorder analysis of event related potentials in human brain / Shashikanta Tarai -- Intelligent big data analytics in health : big data analytics in health / Ebru Bayrak, Pinar Kirci -- Motor imagery classification using EEG signals for brain computer interface applications / Subrota Mazumdar, Rohit Chaudharya, Suruchi Suruchi, Suman Mohanty, Divya Kumari, Aleena Swetapadma -- Mapping the intellectual structure of the field neurological disorders : a bibliometric analysis / S. Ravikmar -- Medical image segmentation an advanced approach / Ramgopal Kashyapdia.1 online resource
Sorting without exchanges on a bit-serial systolic array
No full textThe author considers, a number of bit-serial systolic designs for ordering a list of n elements without 'on-the-fly' exchanges are considered. The algorithms require 4n+p+k bit steps where p=log2 n and k is the number of bits required to encode all the possible elements. The arrays require O(n(p+k)) bit cells with a complexity roughly the same as that of a full adder and between max (p,k) and p+k input/output pins. The input to the array is the list to be sorted and an auxiliary vector whose elements have bit length p. The output is the list itself and the auxiliary vector, which is updated to produce pointers to the correct position of each element in the ordered list
BIT from BIT (IT)
No full textThe author suggests the subjugation of physical reality (IT) to a pair of self-supporting virtual realities (BIT from BIT), neither of which exists without the other
One-bit Compressed Sensing with the k-Support Norm
No full textAbstract In one-bit compressed sensing (1-bit CS), one attempts to estimate a structured parameter (signal) only using the sign of suitable linear measurements. In this paper, we investigate 1-bit CS problems for sparse signals using the recently proposed k-support norm. We show that the new estimator has a closed-form solution, so no optimization is needed. We establish consistency and recovery guarantees of the estimator for both Gaussian and subGaussian random measurements. For Gaussian measurements, our estimator is comparable to the best known in the literature, along with guarantees on support recovery. For sub-Gaussian measurements, our estimator has an irreducible error which, unlike existing results, can be controlled by scaling the measurement vectors. In both cases, our analysis covers the setting of model misspecification, i.e., when the true sparsity is unknown. Experimental results illustrate several strengths of the new estimator
A 6.3 μW 20 bit Incremental Zoom-ADC with 6 ppm INL and 1 μV Offset
No full textA 20-bit incremental ADC for battery-powered sensor applications is presented. It is based on an energy-efficient zoom ADC architecture, which employs a coarse 6-bit SAR conversion followed by a fine 15-bit ΔΣ conversion. To further improve its energy efficiency, the ADC employs integrators based on cascoded dynamic inverters for extra gain and PVT tolerance. Dynamic error correction techniques such as auto-zeroing, chopping and dynamic element matching are used to achieve both low offset and high linearity. Measurements show that the ADC achieves 20-bit resolution, 6 ppm INL and 1 μV offset in a conversion timeof 40 ms, while drawing only 3.5 μA current from a 1.8 V supply. This corresponds to a state-of-the-art figure-of-merit (FoM) of 182.7 dB. The 0.35 mm² chip was fabricated in a standard 0.16 μm CMOS process.Accepted Author ManuscriptElectronic Instrumentatio
Do the European Union's bilateral investment treaties matter? The way forward after Lisbon. CEPS Working Document No. 333, July 2010
No full textThis working paper addresses a number of policy-relevant issues regarding the EU’s bilateral investment treaties (BITS), namely, whether the EU’s BITs have a significantly positive impact on outflows; and which member states and which BIT partners have had a significant experience after the implementation of the BIT. The author finds that both OECD BITs and EU BITs have a statistically significant and positive impact on FDI outflows. This result is robust to the inclusion of variables such as privatisation proceeds that control for the level of economic reform, the level of trade linkages, the level of democratic freedom and a measure of risk of expropriation among other standard controls. A number of policy implications of these findings are also considered
Graphene Nanoribbons based 5-bit Digital-to-Analog Converter
No full textMcCulloch-Pitts neuron structures are comprised of a number of synaptic inputs and a decision element, called soma. In this paper, we propose a 5-bit Graphene Nanoribbon (GNR)-based DAC to fulfill the role of the summation element featuring programmable input weights. The proposed GNR-based 5-bit DAC relies on: (i) GNR unit current cells and (ii) a GNR logic thermometric decoding block. Our implementation is based on mapping the GNR structure's conductance using Matlab and performing the required SPICE analysis using the Matlab based GNR Verilog-A model. The unit current cell geometry and bias conditions were chosen based on the unit cell's conductance map from which we derived its I ON/IOFF ratio, as well as transfer and output characteristics, resembling the classical MOSFET counterpart. By utilizing GNR devices instead of FinFET counterparts, a reduction of the active area of the 5-bit current DAC by up to a factor of three can be achieved. Furthermore, the GNR implementation achieved this while maintaining comparable INL and DNL performance to that of the FinFET variant, i.e., DNL of [-0.196, 0.088] LSB and INL of [-0.809, 0.364] LSB for the proposed GNR 5-bit DAC while operating at a supply voltage of only 0.2 V.Accepted author manuscriptComputer Engineerin
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