1,721,277 research outputs found
sj-pdf-3-smo-10.1177_20503121231220216 – Supplemental material for Does adult socioeconomic status mediate the relationship between adolescent socioeconomic status and adult quality of life?
No full textSupplemental material, sj-pdf-3-smo-10.1177_20503121231220216 for Does adult socioeconomic status mediate the relationship between adolescent socioeconomic status and adult quality of life? by Azam Biderafsh, Abbas Rahimi foroushani and Saharnaz Nedjat in SAGE Open Medicine</p
sj-pdf-2-smo-10.1177_20503121231220216 – Supplemental material for Does adult socioeconomic status mediate the relationship between adolescent socioeconomic status and adult quality of life?
No full textSupplemental material, sj-pdf-2-smo-10.1177_20503121231220216 for Does adult socioeconomic status mediate the relationship between adolescent socioeconomic status and adult quality of life? by Azam Biderafsh, Abbas Rahimi foroushani and Saharnaz Nedjat in SAGE Open Medicine</p
sj-docx-1-smo-10.1177_20503121231220216 – Supplemental material for Does adult socioeconomic status mediate the relationship between adolescent socioeconomic status and adult quality of life?
No full textSupplemental material, sj-docx-1-smo-10.1177_20503121231220216 for Does adult socioeconomic status mediate the relationship between adolescent socioeconomic status and adult quality of life? by Azam Biderafsh, Abbas Rahimi foroushani and Saharnaz Nedjat in SAGE Open Medicine</p
Application-Adaptive Guardbanding to Mitigate Static and Dynamic Variability
No full textThis paper proposes a near-zero area overhead adaptive guardbanding technique to combat CMOS variability for errortolerant (probabilistic) applications as well as traditional error-intolerant applications. The proposed technique leverages a combination of accurate design time analysis and a minimally intrusive runtime technique to mitigate Process, Voltage, and Temperature (PVT) variations. We demonstrate our approach on a 32-bit in-order RISC processor with full post Placement and Routing (P&R) layout results in 45nm TSMC technology. The adaptive guardbanding technique eliminates conservative guardbands on frequency due to PVT variations, thus increases the throughput of probabilistic applications up to 1.9× over the traditional worstcase design. For error-intolerant applications, we introduce the notion of Sequence-Level Vulnerability (SLV) that utilizes circuit-level vulnerability for constructing high-level software knowledge as metadata. Using SLV enables the adaptive guardbanding technique to adapt the frequency simultaneously for dynamic voltage and temperature variations, as well as the sequence of instructions. The proposed technique achieves average 1.6× speedup for error-intolerant applications compared to recent work [33]. The proposed technique has 0.022% area overhead, and imposes only 0.034% and 0.031% total power overhead for intolerant and probabilistic applications respectively
Spatial Memoization: Concurrent Instruction Reuse to Correct Timing Errors in SIMD Architectures
No full textThis brief proposes a novel technique to alleviate the cost of timing error recovery, building upon the lockstep execution of single-instruction-multiple- data (SIMD) architectures. To support spatial memoization at the instruction level, we propose a single-strong-lane-multiple-weak-lane (SSMW) architecture. Spatial memoization exploits the value locality inside parallel programs, memoizes the result of an error-free execution of an instruction on the SS lane, and concurrently reuses the result to spatially correct errant instructions across MW lanes. Experiment results on Taiwan Semiconductor Manufacturing Company 45-nm technology confirm that this technique avoids the recovery for 62% of the errant instructions on average, for both error-tolerant and error-intolerant general-purpose applications
Hierarchically Focused Guardbanding: An Adaptive Approach to Mitigate PVT Variations and Aging
No full textThis paper proposes a new model of functional units for variation-induced timing errors due to PVT variations and device Aging (PVTA). The model takes into account PVTA parameter variations, clock frequency, and the physical details of Placed-and-Routed (P&R) functional units in 45nm TSMC analysis flow. Using this model and PVTA monitoring circuits, we propose Hierarchically Focused Guardbanding (HFG) as a method to adaptively mitigate PVTA variations. We demonstrate the effectiveness of HFG on GPU architecture at two granularities of observation and adaptation: (i) fine-grained instruction-level; and (ii) coarse-grained kernel-level. Using coarse-grained PVTA monitors with kernel-level adaptation, the throughput increases by 70% on average. By comparison, the instruction-by-instruction monitoring and adaptation enhances throughput by a factor of 1.8×–2.1× depending on the configuration of PVTA monitors and the type of instructions executed in the kernels
PULP-HD: Accelerating brain-inspired high-dimensional computing on a parallel ultra-low power platform
Full text linkComputing with high-dimensional (HD) vectors, also referred to as hypervectors, is a brain-inspired alternative to computing with scalars. Key properties of HD computing include a well-defined set of arithmetic operations on hypervectors, generality, scalability, robustness, fast learning, and ubiquitous parallel operations. HD computing is about manipulating and comparing large patterns-binary hypervectors with 10,000 dimensions-making its efficient realization on minimalistic ultra-low-power platforms challenging. This paper describes HD computing's acceleration and its optimization of memory accesses and operations on a silicon prototype of the PULPv3 4-core platform (1.5mm2, 2 mW), surpassing the stateof-the-art classification accuracy (on average 92.4%) with simultaneous 3.7× end-to-end speed-up and 2× energy saving compared to its single-core execution. We further explore the scalability of our accelerator by increasing the number of inputs and classification window on a new generation of the PULP architecture featuring bitmanipulation instruction extensions and larger number of 8 cores. These together enable a near ideal speed-up of 18.4× compared to the single-core PULPv3
Device for high dimensional encoding
No full textThe invention is directed a device for high-dimensional encoding of a plurality of sequences of quantitative data signals. The device comprises a memory crossbar array comprising a plurality of resistive devices, a first peripheral circuit connected to the memory crossbar array, and a second peripheral circuit connected to the first peripheral circuit. The device is configured to receive the plurality of sequences of quantitative data signals via a plurality of input channels and to store elements of a plurality of precomputed basis hypervectors as conductance states of the resistive devices. The plurality of basis hypervectors are bound to respective input channels. The first peripheral circuit performs a temporal encoding of n-grams of the quantitative data signals thereby creating a plurality of temporally encoded hypervectors. The second peripheral circuit performs a spatial encoding of the plurality of temporally encoded hypervectors. This creates a temporally and spatially encoded hypervector
sj-docx-2-jvi-10.1177_02646196221145378 – Supplemental material for Eye movement in reading and linguistic processing among bilingualism in oculomotor apraxia in patients with aphasia
No full textSupplemental material, sj-docx-2-jvi-10.1177_02646196221145378 for Eye movement in reading and linguistic processing among bilingualism in oculomotor apraxia in patients with aphasia by Fazlallah Afshangian, Abbas Rahimi Jaberi, Jack Wellington, Sherif Ahmed Kamel Amer, Bipin Chaurasia, Shokufeh khanzadeh, Hosien Safari, Tomas Freddi, Ahmad Soltani, Leonardo Pipek, Dan Zimelewicz Oberman, Mehmet Resid Onen, Erol Akgul, Nicola Montemurro, Saeedeh Hajebi Khaniki and Radnoosh Pashmforoosh in The British Journal of Visual Impairment</p
sj-docx-1-jvi-10.1177_02646196221145378 – Supplemental material for Eye movement in reading and linguistic processing among bilingualism in oculomotor apraxia in patients with aphasia
No full textSupplemental material, sj-docx-1-jvi-10.1177_02646196221145378 for Eye movement in reading and linguistic processing among bilingualism in oculomotor apraxia in patients with aphasia by Fazlallah Afshangian, Abbas Rahimi Jaberi, Jack Wellington, Sherif Ahmed Kamel Amer, Bipin Chaurasia, Shokufeh khanzadeh, Hosien Safari, Tomas Freddi, Ahmad Soltani, Leonardo Pipek, Dan Zimelewicz Oberman, Mehmet Resid Onen, Erol Akgul, Nicola Montemurro, Saeedeh Hajebi Khaniki and Radnoosh Pashmforoosh in The British Journal of Visual Impairment</p
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