1,720,965 research outputs found
ATLAS ITk-Pixel DAQ system
No full textAbstract During the ATLAS High-Luminosity Large Hadron Collider (HL-LHC) upgrade, the current inner detector is going to be replaced by an all-silicon Inner Tracker (ITk). The pixel detector, located in the innermost part of the ITk, comprises 9716 modules arranged in 5 cylindrical layers around the beam line. The ITk-Pixel Data AcQuisition (DAQ) system basic read-out chain includes the YARR software, communicating with the FELIX PCIe board acting as an interface connected through lpGBT transceivers to the on-detector front-end (FE) chips ITkPix. The FEs are grouped in triplet (3-FE) and mostly in 4-FE Quad Modules (QM), that are installed on local supports, which are integral parts of the ITk structure. The FELIX system is also used for performing Quality Control (QC) tests during integration. The work describes the development steps and corresponding testing and read-out chain validation results. A representative read-out sub-system will be used to develop and validate the different aspects of the read-out chain. This subsystem can be a Loaded Local Support (LLS) comprising few tens of ITkPix QMs with serial powering (SP) and opto-box connection. In order to have the readout chain validated, developments on trigger and command sending and data reading of YARR FelixClient controller were consequently required, working first on a lab setup with a couple of ITkPix single chip cards (SCCs) and QMs. This step has been carried out successfully, paving the road to the next LLS sub-system readout test, once more QMs are available
The ATLAS ITk Strip DetectorSystem for the Phase-II LHCUpgrade
No full textATLAS is currently preparing for the HL-LHC upgrade, with an all-silicon Inner Tracker (ITk) that will replace the current Inner Detector. The ITk will feature a pixel detector surrounded by a strip detector, with the strip system consisting of 4 barrel layers and 6 endcap disks. After completion of final design reviews in key areas, such as Sensors, Modules, Front-End electronics and ASICs, a large scale prototyping program has been completed in all areas successfully. We present an overview of the Strip System, and highlight the final design choices of sensors, module designs and ASICs. We will summarize results achieved during prototyping and the current status of production and pre-production on various detector components, with an emphasis on QA and QC procedures
The ATLAS ITk Strip Detector System for the Phase-II LHC Upgrade
No full textATLAS is currently preparing for the HL-LHC, with an all-silicon Inner Tracker (ITk) that willreplace the current Inner Detector. The ITk will feature a pixel detector surrounded by a stripdetector, with the strip system consisting of 4 barrel layers and 6 endcap disks per side. Aftercompletion of final design reviews in key areas, such as Sensors, Modules, Front-End electronicsand ASICs, a large scale prototyping program has been completed in all areas successfully. Anoverview of the Strip System is presented here, highlighting the final design choices of sensors,module designs and ASICs. In this article, results achieved during prototyping and the currentstatus of production and pre-production on various detector components are summarized, with anemphasis on QA and QC procedures
Data-acquisition system developments for ATLAS pixel QA and QC test toward High-Luminosity LHC
No full textIn preparation for the High-luminosity LHC upgrade, the whole ATLAS inner tracker will be replaced by a new silicon detector tracker. The innermost region will be covered by silicon pixel detectors as a high density of produced particles is expected. To operate in such an environment, high-resolution sensors and a high-speed readout system are required. At the moment, the front-end readout chip prototype RD53A and a data acquisition system (the YARR system) based on a commercial FPGA board and dedicated software for quality assurance and quality control test have been developed. Due to the high density of sensor channels, the output speed from RD53A is at maximum 1.28 Gbps per line, sixteen times faster than the readout front-end chip currently used in the ATLAS pixel system. The data acquisition system needs to establish communication with 1.28 Gbps speed during the quality control tests, to validate the data acquisition path, and to optimize the procedure for data taking at high speed. From the quality control perspective this optimization allows to test large numbers of modules simultaneously exploiting the data acquisition speed reducing the time needed for the tests. Another challenging point is the novel concept of readout structure planned for the operation after installation. In High-luminosity LHC, large parts of the ATLAS data acquisition system infrastructure are going to be shared among all sub-detectors, using FELIX systems, while current ATLAS data acquisition systems are dedicated for each sub-detector. This means that all processes done in the present data acquisition system hardware need to be overhauled into software running on the new data acquisition system. To minimize the differences between the data acquisition system for operation and quality control test, we introduced the prototype FELIX system into the data acquisition path of the YARR system. In this proceeding, an established data acquisition structure for quality assurance and quality control test of the new pixel detector is introduced, and results from basic quality control tests of the pixel detector with the new readout chip are presented
ATLAS ITk pixel detector overview
Get PDFIn the high-luminosity era of the Large Hadron Collider, the instantaneous luminosity is expected to reach unprecedented values, resulting in up to 200 proton–proton interactions in a typical bunch crossing. To cope with the resulting increase in occupancy, bandwidth and radiation damage, the ATLAS Inner Detector will be replaced by an all-silicon system, the Inner Tracker (ITk). The innermost part of the ITk will consist of a pixel detector, with an active area of about 13 m2. To deal with the changing requirements in terms of radiation hardness, power dissipation and production yield, several silicon sensor technologies equipped with novel ASICs connecting by bump-bonding technique will be employed in the five barrel and endcap layers. As a timeline, it is facing to pre-production of components, sensor, building modules, mechanical structures and services. This contribution presents the status of the ITk-pixel project focusing on the lessons learned and the biggest challenges towards production, from mechanics structures to sensors, and it will summarise the latest results on closest-to-real demonstrators built using module, electric and cooling services prototypes
Module development for the ATLAS Phase II Pixel Inner Tracker
No full textThe ATLAS experiment will undergo substantial upgrades to cope with the higher radiation environment and particle hit rates foreseen for HL-LHC. The phase II upgrade will include the replacement of the inner detector with a completely new silicon-based tracker. The ATLAS phase II Inner Tracker (ITk) will consist of hybrid pixel detectors and silicon strip detector layers. The innermost five-barrel layers and several endcap rings will be equipped with hybrid pixel detector modules. The modules are consisting of bare silicon modules connected to flexible printed circuits. Bare silicon modules are made of a silicon pixel sensor connected to either four FE chips to form a quad module or one FE chip to form a single chip module. The ITk phase II pixel community has conducted many developments geared towards meeting the necessary module production quality and throughput. These include establishing quality checking routines of bare module components, tooling developments for their assembly as well as electrical testing infrastructure to assess their operability to specification. A dedicated program to set in motion this effort and streamline these various stages was established using the RD53A front-end chip. Subsequent test and assembly work is being carried out using the ITkPix chips which are final size FE chips. This contribution will provide a detailed overview of these developments and their results in preparation for the ATLAS ITk pixel phase II upgrade module production
The ATLAS ITk detector system for the Phase-II LHC upgrade
Get PDFThe ATLAS experiment is planning a complete replacement of its inner detector with a new all-silicon inner tracker for the high luminosity phase of the LHC. The new detector is designed to cope with the increased pile-up, data rates and radiation levels of the HL-LHC, while maintaining or improving the current ATLAS tracking performance. The ITk design and technology R and D have been completed and pre-production of the detector modules is starting. This paper presents the ITk layout, performance and the ongoing transition into production phase
ATLAS ITk tracking and readout performance
Get PDFThe ATLAS Inner Detector will be replaced with a new all-silicon Inner Tracker (ITk) designed for the challenging environment of the High Luminosity LHC (HL-LHC). The ITk layout of the pixel detector was recently successfully optimized to improve tracking performance and object reconstruction. The data rates of the ITk pixel detector have been evaluated to establish that the detector readout system can read out data at the design L0 trigger frequency of 1 MHz
The ATLAS strip detector system for the High-Luminosity LHC
No full textThe ATLAS experiment at the Large Hadron Collider is currently preparing for a significant upgrade of the Inner Detector (ID) for the High-Luminosity LHC operation, scheduled to start in 2027. A planned integrated luminosity of 4000 fb−1 implies integrated hadron fluences over 2×1016 neq/cm2, requiring a complete replacement of the existing ID. An all-silicon Inner Tracker is under development with a pixel detector surrounded by a strip detector. The strip detector consists of four barrel layers in the centre, while the forward regions are made of six disks at each end, with silicon-strip modules as basic units. With the production of modules scheduled to begin in 2020, a thorough understanding of the current prototype modules is critical. Electrical characterization of the module aims to assess the front-end performance in terms of input noise and noise occupancy. Results of input noise from modules built with different front-end designs are presented. Tracking resolutions and detection efficiency are evaluated in beam tests. Several module prototypes have been built and tested in 2018 and 2019. In this report, the beam test results from different module types are presented. Included are results from the first double-sided end-cap prototype module. The results focus on hit detection efficiencies and spatial resolution of the modules
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